AT91SAM9260B-CU-999 Atmel, AT91SAM9260B-CU-999 Datasheet - Page 670

IC MCU ARM9 217LFBGA

AT91SAM9260B-CU-999

Manufacturer Part Number
AT91SAM9260B-CU-999
Description
IC MCU ARM9 217LFBGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9260B-CU-999

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
POR, WDT
Number Of I /o
96
Program Memory Size
32KB (32K x 8)
Program Memory Type
ROM
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
2-Wire, EBI, I2S, SPI, USART
Maximum Clock Frequency
180 MHz
Number Of Programmable I/os
96
Number Of Timers
6
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
For Use With
AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM9260B-CU-999
Manufacturer:
Atmel
Quantity:
10 000
37.3
Figure 37-1. Block Diagram
37.4
37.4.1
670
AHB
AHB
uhp_int
UHPCK
MCK
Master
Block Diagram
Product Dependencies
Slave
AT91SAM9260
I/O Lines
Master Block
Slave Block
Registers
OHCI
HCI
HCI
Access to the USB host operational registers is achieved through the AHB bus slave interface.
The OpenHCI host controller initializes master DMA transfers through the ASB bus master inter-
face as follows:
Memory access errors (abort, misalignment) lead to an “Unrecoverable Error” indicated by the
corresponding flag in the host controller operational registers.
The USB root hub is integrated in the USB host. Several USB downstream ports are available.
The number of downstream ports can be determined by the software driver reading the root
hub’s operational registers. Device connection is automatically detected by the USB host port
logic.
USB physical transceivers are integrated in the product and driven by the root hub’s ports.
Over current protection on ports can be activated by the USB host controller. Atmel’s standard
product does not dedicate pads to external over current protection.
DPs and DMs are not controlled by any PIO controllers. The embedded USB physical transceiv-
ers are controlled by the USB host controller.
Control
• Fetches endpoint descriptors and transfer descriptors
• Access to endpoint data from system memory
• Access to the HC communication area
• Write status and retire transfer Descriptor
Data
List Processor
FIFO 64 x 8
Regsisters
ED & TD
Block
Root Hub
Host SIE
and
Hub Registers
PORT S/M
PORT S/M
OHCI Root
v2.0 Full-speed Transceiver
USB transceiver
USB transceiver
Embedded USB
6221I–ATARM–17-Jul-09
DM
DM
DP
DP

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