AT91SAM9260B-CU-999 Atmel, AT91SAM9260B-CU-999 Datasheet - Page 778

• Manufacturer Part Number: AT91SAM9260B-CU-999
• Description: IC MCU ARM9 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9260B-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

43.3.14.2
43.3.14.3
43.3.14.4
778
AT91SAM9260
DCD is Active High instead of Low
RXBRK Flag Error in Asynchronous Mode
RTS not Expected Behavior
The DCD signal is active at High level in the USART Modem Mode.
DCD should be active at Low level.
Add an inverter.
When timeguard is 0, RXBRK is not set when the break character is located just after the Stop
Bit. FRAME (Frame Error) is set instead.
Timeguard should be > 0.
None.
1. Setting the receiver to hardware handshaking mode drops RTS line to low level even if
2. Disabling the receiver during a PDC transfer while RXBUFF flag is '0' has no effect on
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
the receiver is still turned off. USART needs to be completely configured and started
before setting the receiver to hardware handshaking mode.
RTS. The only way to get the RTS line to rise to high level is to reset both PDMA buffers
by writing the value '0' in both counter registers.
6221I–ATARM–17-Jul-09