AT91SAM9260B-CU-999 Atmel, AT91SAM9260B-CU-999 Datasheet - Page 783

• Manufacturer Part Number: AT91SAM9260B-CU-999
• Description: IC MCU ARM9 217LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9260B-CU-999

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: POR, WDT
• Number Of I /o: 96
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: ROM
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: 2-Wire, EBI, I2S, SPI, USART
• Maximum Clock Frequency: 180 MHz
• Number Of Programmable I/os: 96
• Number Of Timers: 6
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9260-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM9260-EK - KIT EVAL FOR AT91SAM9260AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6221I–ATARM–17-Jul-09
Revision
6221E
Comments
All new information in
page 16
Access,” on page
In
NWR3.
Added details on Timer/Counter blocks in
Updated Chip ID in
Removed information on Tightly-coupled Memories in
Overview” on page
Boot Program: Updated
Table 13-4, “Input Frequencies Supported,” on page 80
In
EBI: Updated signal names in
A[20-18], NRD, NWR0, NWR1, NWR3, A21 and A22.
Updated A21 and A22 signals in
page
Removed software recommendation for NANDOE and NANDWE PIO multiplexing in
“Software Configuration” on page
RSTC: Updated
Updated
backup_nreset signal reactivation.
Added new
SHDW: Corrected offset value for SHDW_SR register in
Registers,” on page
ECC: Corrected offset value for ECC_SR register in
PMC: In
and added Note.
SPI: Corrected information in
data read in SPI_RDR.
TWI: New chapter inserted.
USART: In
on TXD pertaining to hardware handshaking feature/Modem mode.
In
reset effects (RSTRX and RSTTX in US_CR register) updated by replacing 2nd sentence.
EMAC: Corrected status for IDLE bit in
Added information on clocks in first paragraph of
Figure 2-1 ”AT91SAM9260 Block Diagram” on page
Section 13.4 ”DataFlash
Section 32.6.2 ”Receiver and Transmitter Control” on page
140.
and
Section 25.3 “Processor Clock Controller” on page
Section 12.4.4.1 “General Reset” on page 67
Section 32.5.1 ”I/O Lines” on page
Section 12.4.3 “BMS Sampling” on page
Section 7.2.3 ”Master to Slave
Figure 14-4, ”General Reset State” on page 96
16.
31. Not applicable to product.
Section 8.4 “Chip Identification” on page
127.
Section 7.2.1 ”Matrix
Table 13-3, “Large Crystal Table (MHz) OSCSEL = 1,” on page 79
Boot”, corrected
Section 29.7.4 “SPI Slave Mode” on page 368
Figure 19-1 ”Organization of the External Bus Interface” on page
Table 19-4, “EBI Pins and External Device Connections,” on
153.
Section 36.5.3 ”Network Status Register” on page
Section 10.4.5 “Timer Counter” on page
Masters”,
Access”,
Figure 13-4 ”LDR Opcode” on page
448, added sentence on required use of internal pull up
Section 36.3 ”Functional Description” on page
Table 23-1, “Register Mapping,” on page
67.
Table 7-1, “List of Bus Matrix Masters,” on
Table 7-3, “AT91SAM9260 Masters to Slaves
Section 10. “ARM926EJ-S Processor
with new information on VDDCORE and
3, updated EBI signals NRD, NWR0, NWR1,
with new information.
Table 18-2, “Shutdown Controller (SHDWC)
256, updated information on Idle Mode
23.
454, in the fourth paragraph, software
with Main Supply POR output wave.
on OVRES (SPI_SR) and
83.
38.
Section 19.7.3.2
AT91SAM9260
624.
and
242.
136,
604.
Change
Request
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