P89V662FBC,557 NXP Semiconductors, P89V662FBC,557 Datasheet - Page 2

• Manufacturer Part Number: P89V662FBC,557
• Description: IC 80C51 MCU FLASH 32K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Vr

Specifications of P89V662FBC,557

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 44-TQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 36
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89V6x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1001 - USB IN-CIRCUIT PROG 80C51ISP
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-2435; 935280832557; P89V662FBC

NXP Semiconductors
3. Ordering information
P89V660_662_664_3
Product data sheet
2.3 Comparison to the P89C660/662/664 devices
I
I
I
I
I
I
I
I
Table 1.
Type number
P89V660FA
P89V660FBC
P89V662FA
P89V662FBC
P89V664FA
P89V664FBC
Idle mode
SPI interface. The P89V660/662/664 devices include an SPI interface that was not
present on the P89C660/662/664 devices.
Dual I
The P89C660/662/664 devices have one.
More I/O pins. The P89V660/662/664 devices have an additional four-bit I/O port,
Port 4.
The 6x/12x mode on theP89V660/662/664 devices is programmable and erasable
using ISP and IAP as well as parallel programmer mode. The P89C660/662/664
devices could only be switched using parallel programmer mode.
Smaller block sizes. The smallest block size on the P89C660/662/664 devices was
8 kB. The P89V660/662/664 devices have a page size of 128 B. These small pages
can be erased and reprogrammed using IAP function calls making use of the code
memory for non-volatile data storage practical. Each page erase is 30 ms or less. The
IAP and ISP code in P89V660/662/664 devices support these 128-byte page
operations. In addition, the IAP and ISP code uses multiple page erase operations to
emulate the erasing of the larger block sizes (8 kB and 16 kB to maintain firmware
compatibility).
Status bit versus Status byte. The P89V660/662/664 devices used a Status byte to
control the automatic entry into ISP mode following a reset. On the P89V660/662/664
devices this has changed to a single Status bit. Since the ISP entry was based on the
zero/non-zero value of the Status byte this is an almost identical operation on the
P89V660/662/664 devices.
Faster block erase. The erase time for the entire user code memory of the
P89V660/662/664 devices is 150 ms.
2
C-bus interfaces. The P89V660/662/664 devices have two I
Ordering information
Rev. 03 — 10 November 2008
Package
Name
PLCC44
TQFP44
PLCC44
TQFP44
PLCC44
TQFP44
Description
plastic leaded chip carrier; 44 leads
plastic thin quad flat package; 44 leads; body
10
plastic leaded chip carrier; 44 leads
plastic thin quad flat package; 44 leads; body
10
plastic leaded chip carrier; 44 leads
plastic thin quad flat package; 44 leads; body
10
80C51 with 512 B/1 kB/2 kB RAM, dual I
10
10
10
1.0 mm
1.0 mm
1.0 mm
P89V660/662/664
© NXP B.V. 2008. All rights reserved.
2
C-bus interfaces.
Version
SOT187-2
SOT376-1
SOT187-2
SOT376-1
SOT187-2
SOT376-1
2
C-bus, SPI
2 of 89