MC9S12P96CFT Freescale Semiconductor, MC9S12P96CFT Datasheet - Page 368

• Manufacturer Part Number: MC9S12P96CFT
• Description: MCU 16BIT 96K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P96CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Communication Interface (S12SCIV5)
11.3.2.2
Read: Anytime, if AMAP = 0.
Write: Anytime, if AMAP = 0.
368
Module Base + 0x0002
SBR[12:0]
TNP[1:0]
Reset
Field
IREN
6:5
4:0
7:0
7
W
R
LOOPS
Infrared Enable Bit — This bit enables/disables the infrared modulation/demodulation submodule.
0 IR disabled
1 IR enabled
Transmitter Narrow Pulse Bits — These bits enable whether the SCI transmits a 1/16, 3/16, 1/32 or 1/4 narrow
pulse. See
SCI Baud Rate Bits — The baud rate for the SCI is determined by the bits in this register. The baud rate is
calculated two different ways depending on the state of the IREN bit.
The formulas for calculating the baud rate are:
Note: The baud rate generator is disabled after reset and not started until the TE bit or the RE bit is set for the
Note: Writing to SCIBDH has no effect without writing to SCIBDL, because writing to SCIBDH puts the data in
SCI Control Register 1 (SCICR1)
0
7
When IREN = 0 then,
When IREN = 1 then,
This register is only visible in the memory map if AMAP = 0 (reset
condition).
SCI baud rate = SCI bus clock / (16 x SBR[12:0])
SCI baud rate = SCI bus clock / (32 x SBR[12:1])
first time. The baud rate generator is disabled when (SBR[12:0] = 0 and IREN = 0) or (SBR[12:1] = 0 and
IREN = 1).
a temporary location until SCIBDL is written to.
Table
SCISWAI
0
6
11-3.
Table 11-2. SCIBDH and SCIBDL Field Descriptions
TNP[1:0]
Figure 11-5. SCI Control Register 1 (SCICR1)
11
10
01
00
Table 11-3. IRSCI Transmit Pulse Width
S12P-Family Reference Manual, Rev. 1.13
RSRC
0
5
NOTE
M
0
4
Description
Narrow Pulse Width
WAKE
1/32
1/16
3/16
1/4
0
3
ILT
0
2
Freescale Semiconductor
PE
0
1
PT
0
0