MC9S12P96CFT Freescale Semiconductor, MC9S12P96CFT Datasheet - Page 457
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MC9S12P96CFT
Manufacturer Part Number
MC9S12P96CFT
Description
MCU 16BIT 96K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet
1.S9S12P32J0MFT.pdf
(566 pages)
Specifications of MC9S12P96CFT
Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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13.4.5.3
The Erase Verify P-Flash Section command will verify that a section of code in the P-Flash memory is
erased. The Erase Verify P-Flash Section command defines the starting point of the code to be verified and
the number of phrases.
Upon clearing CCIF to launch the Erase Verify P-Flash Section command, the Memory Controller will
verify the selected section of Flash memory is erased. The CCIF flag will set after the Erase Verify P-Flash
Section operation has completed.
13.4.5.4
The Read Once command provides read access to a reserved 64 byte field (8 phrases) located in the
nonvolatile information register of P-Flash. The Read Once field is programmed using the Program Once
Freescale Semiconductor
Register
Register
FSTAT
FSTAT
Erase Verify P-Flash Section Command
Read Once Command
Table 13-35. Erase Verify P-Flash Section Command FCCOB Requirements
Table 13-36. Erase Verify P-Flash Section Command Error Handling
MGSTAT1
MGSTAT0
MGSTAT1
MGSTAT0
ACCERR
ACCERR
Error Bit
Error Bit
FPVIOL
FPVIOL
Table 13-34. Erase Verify Block Command Error Handling
CCOBIX[2:0]
000
001
010
S12P-Family Reference Manual, Rev. 1.13
Set if CCOBIX[2:0] != 000 at command launch
Set if an invalid global address [17:16] is supplied
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
Set if CCOBIX[2:0] != 010 at command launch
Set if command not available in current mode (see
Set if an invalid global address [17:0] is supplied
Set if a misaligned phrase address is supplied (global address [2:0] != 000)
Set if the requested section crosses a 128 Kbyte boundary
None
Set if any errors have been encountered during the read
Set if any non-correctable errors have been encountered during the read
Global address [15:0] of the first phrase to be verified
Number of phrases to be verified
0x03
FCCOB Parameters
Global address [17:16] of
Error Condition
Error Condition
a P-Flash block
128 KByte Flash Module (S12FTMRC128K1V1)
Table
13-27)
457
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