MC9S12P96CFT Freescale Semiconductor, MC9S12P96CFT Datasheet - Page 72

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MC9S12P96CFT

Manufacturer Part Number
MC9S12P96CFT
Description
MCU 16BIT 96K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12P96CFT

Core Processor
HCS12
Core Size
16-Bit
Speed
32MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S12P
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, DEMO9S12PFAME
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
1. Read: Anytime
Port Integration Module (S12PPIMV1)
2.3.17
72
Address 0x0241
7-6, 3-1
Write:Never, writes to this register have no effect.
Field
PTT
PTT
PTT
Reset
4,0
5
W
R
Port T general purpose input/output data—Data Register, TIM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port T general purpose input/output data—Data Register, TIM output, routed PWM output, API_EXTCLK output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
Port T general purpose input/output data—Data Register, TIM output, routed PWM output
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
• The TIM output function takes precedence over the general purpose I/O function if the related channel is enabled.
• The TIM output function takes precedence over the routed PWM, API_EXTCLK function and the general purpose
• The routed PWM function takes precedence over API_EXTCLK and the general purpose I/O function if the related
• The API_EXTCLK takes precedence over the general purpose I/O function if enabled.
• The TIM output function takes precedence over the routed PWM and the general purpose I/O function if the
• The routed PWM function takes precedence over the general purpose I/O function if the related channel is
PTIT7
Port T Input Register (PTIT)
I/O function if the related channel is enabled.
channel is enabled.
related channel is enabled.
enabled.
u
7
= Unimplemented or Reserved
PTIT6
u
6
Table 2-14. PTT Register Field Descriptions
Figure 2-15. Port T Input Register (PTIT)
S12P-Family Reference Manual, Rev. 1.13
PTIT5
5
u
PTIT4
u
4
Description
u = Unaffected by reset
PTIT3
u
3
PTIT2
u
2
Freescale Semiconductor
PTIT1
u
1
Access: User read
PTIT0
u
0
(1)

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