D13002X16V Renesas Electronics America, D13002X16V Datasheet - Page 151

MCU 3/5V 0K 100-TQFP

D13002X16V

Manufacturer Part Number
D13002X16V
Description
MCU 3/5V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of D13002X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D13002X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Figure 6-19 shows the timing when the bus right is requested by an external bus master during a
read cycle in a two-state-access area. There is a minimum interval of two states from when the
BREQ signal goes low until the bus is released.
ø
Address
bus
Data bus
(D
AS
HWR
BREQ
BACK
1
2
3
4, 5
6
15
,
to D )
RD
Low
BACK
BREQ
High
BREQ
,
LWR
0
BREQ
BREQ
signal goes low at end of CPU read cycle, releasing bus right to external bus master.
pin continues to be sampled while bus is released to external bus master.
signal goes high, ending bus-release cycle.
High
signal is sampled at rise of T state.
signal is sampled twice consecutively.
Figure 6-19 Interconnections with Memory (Example)
1
CPU cycles
Minimum 2 cycles
T
Address
1
T
1
2
2
134
3
External bus released
High-impedance
High-impedance
High-impedance
High-impedance
4
5
6
CPU cycles

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