D13002X16V Renesas Electronics America, D13002X16V Datasheet - Page 354

MCU 3/5V 0K 100-TQFP

D13002X16V

Manufacturer Part Number
D13002X16V
Description
MCU 3/5V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of D13002X16V

Core Processor
H8/300H
Core Size
16-Bit
Speed
16MHz
Connectivity
SCI
Peripherals
DMA, PWM, WDT
Number Of I /o
38
Program Memory Type
ROMless
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
D13002X16V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Setup Procedure for Complementary PWM Mode: Figure 10-33 shows a sample procedure for
setting up complementary PWM mode.
Note: After exiting complementary PWM mode, to resume operating in complementary
PWM mode, follow the entire setup procedure from step 1 again.
Complementary PWM mode
Complementary PWM mode
Figure 10-33 Setup Procedure for Complementary PWM Mode (Example)
Select complementary
Set general registers
Select counter clock
Start counters
Stop counting
PWM mode
Set TCNTs
1
2
3
4
5
6
338
1. Clear bits STR3 and STR4 to 0 in
2. Set bits TPSC2 to TPSC0 in TCR to
3. Set bits CMD1 and CMD0 in TFCR
4. Clear TCNT4 to H'0000. Set the
5. GRA3 is the waveform period
6. Set bits STR3 and STR4 in TSTR to
TSTR to halt the timer counters.
Complementary PWM mode must be
set up while TCNT3 and TCNT4 are
halted.
select the same counter clock source
for channels 3 and 4. If an external
clock source is selected, select the
external clock edge(s) with bits
CKEG1 and CKEG0 in TCR. Do not
select any counter clear source
with bits CCLR1 and CCLR0 in TCR.
to select complementary PWM mode.
TIOCA
TOCXA
become PWM output pins.
non-overlap margin in TCNT3. Do not
set TCNT3 and TCNT4 to the same
value.
register. Set the upper limit value of
TCNT3 minus 1 in GRA3. Set
transition times of the PWM output
waveforms in GRB3, GRA4, and
GRB4. Set times within the compare
match range of TCNT3 and TCNT4.
T
GRA4, or GRB4. T: initial setting of
TCNT3)
1 to start TCNT3 and TCNT4.
X (X: initial setting of GRB3,
3
4
, TIOCB
, and TOCXB
3
, TIOCA
4
automatically
4
, TIOCB
4
,

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