D13002X16V Renesas Electronics America, D13002X16V Datasheet - Page 408

• Manufacturer Part Number: D13002X16V
• Description: MCU 3/5V 0K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of D13002X16V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SCI
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

11.2.10 TPC Output Mode Register (TPMR)
TPMR is an 8-bit readable/writable register that selects normal or non-overlapping TPC output for
each group.
The output trigger period of a non-overlapping TPC output waveform is set in general register B
(GRB) in the ITU channel selected for output triggering. The non-overlap margin is set in general
register A (GRA). The output values change at compare match A and B. For details see
section 11.3.4, Non-Overlapping TPC Output.
TPMR is initialized to H'F0 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bits 7 to 4—Reserved: These bits cannot be modified and are always read as 1.
Bit
Initial value
Read/Write
Group 3 non-overlap
Selects non-overlapping TPC
output for group 3 (TP
Group 2 non-overlap
Selects non-overlapping TPC
output for group 2 (TP
Group 1 non-overlap
Selects non-overlapping TPC
output for group 1 (TP to TP )
Group 0 non-overlap
Selects non-overlapping TPC
output for group 0 (TP to TP )
—
—
7
1
15
11
7
3
Reserved bits
—
—
6
1
to TP )
to TP )
4
0
12
8
—
—
5
1
392
—
—
4
1
G3NOV
R/W
3
0
G2NOV
R/W
2
0
G1NOV
R/W
1
0
G0NOV
R/W
0
0