HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 133

• Manufacturer Part Number: HD64F3048F16
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048F16

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

5.3
The interrupt sources include external interrupts (NMI, IRQ
5.3.1
There are seven external interrupts: NMI, and IRQ
can be used to exit software standby mode.
NMI
NMI is the highest-priority interrupt and is always accepted, regardless of the states of the I and UI
bits in CCR. The NMIEG bit in SYSCR selects whether an interrupt is requested by the rising or
falling edge of the input at the NMI pin * . NMI interrupt exception handling has vector number 7.
Note: * For the H8/3048F-ONE (single power supply with flash memory), the NMI input may
IRQ
These interrupts are requested by input signals at pins IRQ
have the following features.
Figure 5.2 shows a block diagram of interrupts IRQ
ISCR settings can select whether an interrupt is requested by the low level of the input at pins
IRQ
IER settings can enable or disable the IRQ
assigned by four bits in IPRA (IPRA7 to IPRA4).
The status of IRQ
to 0 by software.
0
to IRQ
0
to IRQ
Interrupt Sources
External Interrupts
be prohibited. For details, refer to section 18.8.4, NMI Input Disable Conditions.
5
Interrupts
5
, or by the falling edge.
0
to IRQ
5
interrupt requests is indicated in ISR. The ISR flags can be cleared
0
to IRQ
0
0
to IRQ
to IRQ
5
interrupts. Interrupt priority levels can be
Rev. 3.00 Sep 27, 2006 page 105 of 872
0
5
. Of these, NMI, IRQ
5
to IRQ
0
.
to IRQ
5
. The IRQ
5
) and 30 internal interrupts.
Section 5 Interrupt Controller
0
to IRQ
REJ09B0325-0300
0
, IRQ
5
1
interrupts
, and IRQ
2