HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 196

• Manufacturer Part Number: HD64F3048F16
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048F16

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 7 Refresh Controller
7.2.3
RTCNT is an 8-bit readable/writable up-counter.
RTCNT is an up-counter that is incremented by an internal clock selected by bits CKS2 to CKS0
in RTMCSR. When RTCNT matches RTCOR (compare match), the CMF flag is set to 1 and
RTCNT is cleared to H'00.
RTCNT is write-disabled when the PSRAME bit or DRAME bit is set to 1. RTCNT is initialized
to H'00 by a reset and in standby mode.
7.2.4
RTCOR is an 8-bit readable/writable register that determines the interval at which RTCNT is
compare matched.
RTCOR and RTCNT are constantly compared. When their values match, the CMF flag is set to 1
in RTMCSR, and RTCNT is simultaneously cleared to H'00.
RTCOR is write-disabled when the PSRAME bit or DRAME bit is set to 1. RTCOR is initialized
to H'FF by a reset and in hardware standby mode. In software standby mode it retains its previous
value.
Rev. 3.00 Sep 27, 2006 page 168 of 872
REJ09B0325-0300
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Refresh Timer Counter (RTCNT)
Refresh Time Constant Register (RTCOR)
R/W
R/W
7
0
7
1
R/W
R/W
6
0
6
1
R/W
R/W
5
0
5
1
R/W
R/W
4
0
4
1
R/W
R/W
3
0
3
1
R/W
R/W
2
0
2
1
R/W
R/W
1
0
1
1
R/W
R/W
0
0
0
1