HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 627
HD64F3048F16
Manufacturer Part Number
HD64F3048F16
Description
IC H8 MCU FLASH 128K 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of HD64F3048F16
Core Processor
H8/300H
Core Size
16-Bit
Speed
8MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Package
100PQFP
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
70
Interface Type
SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Since the flash memory cannot be read while it is being programmed/erased, place a programming
program on external memory, or transfer the programming program to RAM area, and execute it
in the RAM.
Figure 18.11 shows the procedure for executing when transferred to on-chip RAM. During reset
start, starting from the user program mode is possible.
1
2
3
4
5
6
7
8
Branch to programming/erasing
(flash memory reprogramming)
Transfer programming/erasing
Execute programming/erasing
Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
MD
(user program mode exit)
program in flash memory
Execute user application
Input low level to FWE
Figure 18.11 User Program Mode Execution Procedure (Example)
program in RAM area
(user program mode)
2
after SWE bit clear
–MD
program to RAM
program in RAM
FWE = high
Reset start
0
= 101, 110, 111
Procedure
The user writes a program that executes steps
3 to 8 in advance as shown below.
1. Sets the mode pin to an on-chip ROM
2. Starts the CPU via reset.
3. Transfers the programming/erasing program
4. Branches to the program in RAM area.
5. Sets the FWE pin to a high level.*
6. After confirming that the FWE pin is a high
7. At the end of reprograming, clears the SWE
8. Branches to, and executes, the user
Note: * For notes on FWE pin High/Low, see
enable mode (mode 5, 6, or 7).
(The CPU can also be started from the user
program mode by setting the FWE pin to
High level during reset; that is, during the
period the RES pin is a low level.)
to RAM.
(Switches to user program mode.)
level, executes the programming/erasing
program in RAM. This reprograms the user
application program in flash memory.
bit, and exits the user program mode by
switching the FWE pin from a high level to a
low level. *
application program reprogrammed in flash
memory.
Rev. 3.00 Sep 27, 2006 page 599 of 872
section 18.11, Notes on Flash Memory
Programming/Erasing.
REJ09B0325-0300
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