HD64F3048F16 Renesas Electronics America, HD64F3048F16 Datasheet - Page 390

• Manufacturer Part Number: HD64F3048F16
• Description: IC H8 MCU FLASH 128K 100QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3048F16

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 8MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Package: 100PQFP
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 70
• Interface Type: SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 16-Bit Integrated Timer Unit (ITU)
Waveform Output by Compare Match
In ITU channels 0, 1, 3, and 4, compare match A or B can cause the output at the TIOCA or
TIOCB pin to go to 0, go to 1, or toggle. In channel 2 the output can only go to 0 or go to 1.
Sample setup procedure for waveform output by compare match: Figure 10.19 shows a
sample procedure for setting up waveform output by compare match.
Rev. 3.00 Sep 27, 2006 page 362 of 872
REJ09B0325-0300
External
clock input
TCNT input
TCNT
Figure 10.18 Count Timing for External Clock Sources (when Both Edges Are Detected)
Figure 10.19 Setup Procedure for Waveform Output by Compare Match (Example)
Waveform output
Set output timing
Select waveform
Output setup
Start counter
output mode
N – 1
1
2
3
1.
2.
3.
Select the compare match output mode (0, 1, or
toggle) in TIOR. When a waveform output mode
is selected, the pin switches from its generic input/
output function to the output compare function
(TIOCA or TIOCB). An output compare pin outputs
0 until the first compare match occurs.
Set a value in GRA or GRB to designate the
compare match timing.
Set the STR bit to 1 in TSTR to start the timer
counter.
N
N + 1