HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 16

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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1.2.1 General Registers
All the general registers can be used as both data registers and address registers. When used as
address registers, the general registers are accessed as 16-bit registers (R0 to R7). When used
as data registers, they can be accessed as 16-bit registers (R0 to R7), or the high (R0H to R7H)
and low (R0L to R7L) bytes can be accessed separately as 8-bit registers. The register length
is determined by the instruction.
R7 also functions as the stack pointer, used implicitly by hardware in processing interrupts and
subroutine calls. In assembly language, the letters SP can be coded as a synonym for R7. As
indicated in figure 1-4, R7 (SP) points to the top of the stack.
1.2.2 Control Registers
The CPU has a 16-bit program counter (PC) and an 8-bit condition code register (CCR).
(1) Program Counter (PC): This 16-bit register indicates the address of the next instruction
the CPU will execute. Instructions are fetched by 16-bit (word) access, so the least significant
bit of the PC is ignored (always regarded as 0).
(2) Condition Code Register (CCR): This 8-bit register indicates the internal status of the
CPU with an interrupt mask (I) bit and five flag bits: half-carry (H), negative (N), zero (Z),
overflow (V), and carry (C) flags. The two unused bits are available to the user. The bit
configuration of the condition code register is shown below.
SP (R7)
Figure 1-4. Stack Pointer
6
Unused area
Stack area

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