HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 17

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HD64F3337YCP16

Manufacturer Part Number
HD64F3337YCP16
Description
IC H8 MCU FLASH 60K 84PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16

Core Processor
H8/300
Core Size
8-Bit
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
Package
84PLCC
Family Name
H8
Maximum Speed
16 MHz
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
74
Interface Type
HIF/I2C/SCI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Bit
Initial value
Read/Write
*
Bit 7—Interrupt Mask Bit (I): When this bit is set to "1," all interrupts except NMI are
masked. This bit is set to "1" automatically by a reset and at the start of interrupt handling.
Bits 6 and 4—User Bits (U): These bits can be written and read by software for its own
purposes.
Bit 5—Half-Carry (H): This bit is used by add, subtract, and compare instructions to indicate
a borrow or carry out of bit 3 or bit 11. It is referenced by the decimal adjust instructions.
Bit 3—Negative (N): This bit indicates the most significant bit (sign bit) of the result of an
instruction.
Bit 2—Zero (Z): This bit is set to "1" to indicate a zero result and cleared to "0" to indicate a
nonzero result.
Bit 1—Overflow (V): This bit is set to "1" when an arithmetic overflow occurs, and cleared
to "0" at other times.
Bit 0—Carry (C): This bit is used by:
System control instructions can load and store the CCR, and perform logic operations to set,
clear, or toggle selected bits.
1.2.3 Initial Register Values
When the CPU is reset, the program counter (PC) is loaded from the vector table and the
interrupt mask bit (I) in the CCR is set to “1.” The other CCR bits and the general registers are
not initialized.
Undetermined
Add, subtract, and compare instructions, to indicate a carry or borrow at the most
Shift and rotate instructions, to store the value shifted out of the most or least significant
Bit manipulation instructions, as a bit accumulator
significant bit
bit
R/W
7
1
I
R/W
U
6
*
R/W
H
5
*
R/W
U
4
*
7
R/W
N
3
*
R/W
Z
2
*
R/W
V
1
*
R/W
C
0
*

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