HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 39

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Calculation of Effective Address: Table 1-12 shows how the H8/300 calculates effective
addresses in each addressing mode.
Arithmetic, logic, and shift instructions use register direct addressing (1). The ADD.B,
ADDX, SUBX, CMP.B, AND, OR, and XOR instructions can also use immediate addressing
(6).
The MOV instruction uses all the addressing modes except program-counter relative (7) and
memory indirect (8).
Bit manipulation instructions use register direct (1), register indirect (2), or absolute (5)
addressing to identify a byte operand and 3-bit immediate addressing to identify a bit within
the byte. The BSET, BCLR, BNOT, and BTST instructions can also use register direct
addressing (1) to identify the bit.
Effective Address Calculation
Table 1-12 explains how the effective address is calculated in each addressing mode.
Table 1-12, Effective Address Calculation (1)
No.
1
2
15
Addressing mode,
instruction format
Register direct Rn.
Register indirect @Rn
15
OP
OP
8 7
7 6
reg m
reg
4 3
4 3
reg n
0
0
Effective address
calculation
None
15
16-bit register contents
29
0
15
Effective
address
Operand are contained in
registers m and n
Operand is at address
indicated by register
3
reg m
0
3
reg n
0
0