HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 61

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

BIOR (Bit Invert OR)
<Operation>
C
<Assembly-Language Format>
BIOR #xx:3, <EAd>
<Examples>
BIOR #6, R1H
BIOR #3, @R2
BIOR #0, @H'FFF0:8
<Operand Size>
Byte
<Description>
This instruction ORs the inverse of a specified bit with the carry flag and places the result in
the carry flag. The specified bit can be located in a general register or memory. The bit
number is specified by 3-bit immediate data. The operation is shown schematically below.
The value of the specified bit is not changed.
<Instruction Formats>
*Register direct, register indirect, or absolute addressing.
<EAd>*
Register direct
Register indirect
Absolute address
[¬ (<Bit No.> of <EAd>)]
Addressing
mode
Byte data in register or memory
Mnem.
BIOR
BIOR
BIOR
#xx:3, Rd
#xx:3,@Rd
#xx:3,@aa:8
Operands
C
Bit No.
1st byte
7
7
7
51
4
C
E
Instruction code
7
<Condition Code>
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: ORed with the inverse of the specified
1 IMM
0 rd
C
#xx:3
2nd byte
bit.
— — — — — — —
I
abs
rd
0
Invert
H
3rd byte
7
7
0
C
4 1 IMM
4 1 IMM
N
4th byte
Z
0
0
V
BIOR
No. of
states
C
2
6
6