HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 97

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

MOV (MOVe data) (word)
<Description>
This instruction moves one word of data from a general register to memory and sets condition
code flags according to the data value.
The destination address in memory must be even.
MOV.W Rs, @–R7 is identical in machine language to PUSH.W Rs.
The instruction MOV.W Rn, @–Rn decrements register Rn by 2, then moves the decremented
result to memory.
<Instruction Formats>
<Operation>
Rs
<Assembly-Language Format>
MOV.W Rs, <EAd>
<Examples>
MOV.W R3, @R4
MOV.W R2, @(H,0030,R5)
MOV.W R1, @–R7
MOV.W R0, @H'FED6
<Operand Size>
Word
Register indirect
Register indirect
with displacement
Register indirect
with pre-decrement MOV.W
Absolute address
Addressing
mode
(EAd)
Mnem.
MOV.W
MOV.W
MOV.W
Rs, @Rd
Rs,
@(d:16, Rd)
Rs, @-Rd
Rs, @aa:16
Operands
1st byte
6
6
6
6
87
<Condition Code>
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Set to "1" if the data value is negative;
Z: Set to "1" if the data value is zero;
V: Cleared to "0."
C: Previous value remains unchanged.
B
9 1 rd 0 rs
F 1 rd 0 rs
D 1 rd 0 rs
otherwise cleared to "0."
otherwise cleared to "0."
— — — —
I
2nd byte
8
Instruction code
0 rs
H
3rd byte
N
disp.
abs.
4th byte
Z
V
0
MOV
—
C
No. of
states
4
6
6
6