HD64F3337YCP16 Renesas Electronics America, HD64F3337YCP16 Datasheet - Page 29

• Manufacturer Part Number: HD64F3337YCP16
• Description: IC H8 MCU FLASH 60K 84PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16

• Core Processor: H8/300
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• Package: 84PLCC
• Family Name: H8
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 74
• Interface Type: HIF/I2C/SCI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

After Execution of BSET Instruction
Input/output
Pin state
DDR
DR
Pull-up
Explanation: To execute the BSET instruction, the CPU begins by reading port 4. Since P4
and P4
register. It reads P4
Since P4
("0"). The CPU therefore reads the value of port 4 as H'40, although the actual value in P4DR
is H'80.
Next the CPU sets bit 0 of the read data to "1," changing the value to H'41.
Finally, the CPU writes this value (H'41) back to P4DR to complete the BSET instruction.
As a result, bit P4
P4
and P4
Programming Solution: The switching of the pull-ups for P4
avoided by storing the same data in both the port-4 data register and in a work area in RAM.
Bit manipulations are performed on the data in the work area, after which the result is moved
into the port-4 data register. In the following example RAM0 is a symbol for the user-selected
address of the work area.
Before Execution of BSET Instruction
MOV.B
MOV.B
MOV.B
6
are both modified, changing the on/off settings of the MOS pull-up transistors of pins P4
6
6
.
are input pins, the CPU reads the level of these pins directly, not the value in the data
5
to P4
#80
R0L
R0L
0
are output pins, for these pins the CPU reads the value in the data register
P4
Input
Low
0
0
Off
0
is set to "1," switching pin P4
R0L
@RAM0
@PORT4 ; write to DR
7
7
as Low ("0") and P4
P4
Input
High
0
1
On
6
; write data (H'80) for data register
; write to DR work area (RAM0)
P4
Output Output Output Output Output Output
Low
1
0
Off
5
6
as High ("1").
P4
Low
1
0
Off
19
4
0
to High output. In addition, bits P4
P4
Low
1
0
Off
3
P4
Low
1
0
Off
7
and P4
2
P4
Low
1
0
Off
6
in example 2 can be
1
P4
High
1
1
Off
0
7
and
7
7