HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 246

• Manufacturer Part Number: HD6473834HV
• Description: MCU 5V 32K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473834HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 71
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Serial Control/Status Register 1 (SCSR1)
Note: * Only a write of 0 for flag clearing is possible.
SCSR1 is an 8-bit read/write register indicating operation status and error status.
Upon reset, SCSR1 is initialized to H'80.
Bit 7—Reserved Bit: Bit 7 is reserved; it is always read as 1, and cannot be modified.
Bit 6—Extended Data Bit (SOL): Bit 6 sets the SO
output level at the SO
of the last bit of transmitted data. The SO
after a transmission. The SOL bit setting remains valid only until the start of the next transmission.
To control the level of the SO
the end of each transmission. Do not write to this register while transmission is in progress,
because that may cause a malfunction.
Bit 6: SOL
0
1
Bit 5—Overrun Error Flag (ORER): When an external clock is used, bit 5 indicates the
occurrence of an overrun error. If a clock pulse is input after transfer completion, this bit is set to 1
indicating an overrun. If noise occurs during a transfer, causing an extraneous pulse to be
superimposed on the normal serial clock, incorrect data may be transferred.
Bit 5: ORER
0
1
Bit
Initial value
Read/Write
Description
Read: SO
Write: SO
Read: SO
Write: SO
Description
Clearing conditions:
After reading ORER = 1, cleared by writing 0 to ORER
Setting conditions:
Set if a clock pulse is input after transfer is complete, when an external clock is
used
—
—
7
1
1
pin. After completion of a transmission, SO
1
1
1
SOL
1
1
R/W
pin output level changes to low
pin output level changes to high
pin after transmission ends, it is necessary to write to the SOL bit at
pin output level is low
pin output level is high
6
0
R/(W)*
ORER
1
5
0
output can be changed by writing to SOL before or
—
—
4
0
1
output level. When read, SOL returns the
—
—
3
0
1
continues to output the value
—
—
2
0
R/W
—
1
0
(initial value)
(initial value)
STF
R/W
0
0
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