HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 287

• Manufacturer Part Number: HD6473834HV
• Description: MCU 5V 32K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473834HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 71
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.4.4
In asynchronous communication mode, a start bit indicating the start of communication and a stop
bit indicating the end of communication are added to each character that is sent. In this way
synchronization is achieved for each character as a self-contained unit.
SCI3 consists of independent transmit and receive modules, giving it the capability of full duplex
communication. Both the transmit and receive modules have a double-buffer configuration,
allowing data to be read or written during communication operations so that data can be
transmitted and received continuously.
Transmit/Receive Formats
Figure 10.9 shows the general format for asynchronous serial communication.
The communication line in asynchronous communication mode normally stays at the high level, in
the “mark” state. SCI3 monitors the communication line, and begins serial data communication
when it detects a “space” (low-level signal), which is regarded as a start bit.
One character consists of a start bit (low level), transmit/receive data (in LSB-first order: starting
with the least significant bit), a parity bit (high or low level), and finally a stop bit (high level), in
this order.
In asynchronous data receiving, synchronization is with the falling edge of the start bit. SCI3
samples data on the 8th pulse of a clock that has 16 times the frequency of the bit rate, so each bit
of data is latched at its center.
Table 10.16 shows the 12 transmit/receive formats formats that can be selected in asynchronous
mode. The format is selected in the serial mode register (SMR).
270
Serial
data
Operation in Asynchronous Mode
Figure 10.9 Data Format in Asynchronous Serial Communication Mode
Start
1 bit
bit
(LSB)
One unit of data (character or frame)
Transmit or receive data
7 or 8 bits
(MSB)
Parity
none
1 bit
bit
or
Stop bit
1 or 2
bits
Mark
state
1