HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 257

MCU 5V 32K PB-FREE 100-QFP

HD6473834HV

Manufacturer Part Number
HD6473834HV
Description
MCU 5V 32K PB-FREE 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD6473834HV

Core Processor
H8/300L
Core Size
8-Bit
Speed
5MHz
Connectivity
SCI
Peripherals
LCD, PWM
Number Of I /o
71
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473834HV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6473834HV
Manufacturer:
RENESAS
Quantity:
2 120
Bit 1: ABT
0
1
Bit 0—Start Flag (STF): Bit 0 controls the start of a transfer. If bit CS = 0 in PMR2, setting bit
STF to 1 causes SCI2 to start transferring data. If bit CS = 1 in PMR2, SCI2 starts transferring
data when CS goes low. This bit stays at 1 during the transfer or while waiting for CS input; it is
cleared to 0 after the transfer is completed or when the transfer is aborted by CS. It can therefore
be used as a busy flag.
Clearing this bit to 0 during a transfer aborts the transfer. The contents of the (32-byte) serial data
buffer and of internal registers other than SCSR2 remain unchanged.
Bit 0: STF
0
1
10.3.3
SCI2 has a 32-byte serial data buffer, making possible continuous transfer of up to 32 bytes of data
with one operation. SCI2 transmits and receives data in synchronization with clock pulses.
Depending on register settings, it can transmit, receive, or transmit and receive simultaneously.
When transmission is set, the serial data buffer values are retained after the transmission is
completed.
Either an internal clock or external clock may be selected as the serial clock. When an internal
clock is selected, gaps may be inserted between the data bytes. It is also possible to output a strobe
signal at pin STRB. When an external clock is selected, the overrun flag allows detection of
erroneous operation due to unwanted clock input.
Transfers can be started or aborted by input at pin CS. Abort is indicated by means of an abort
flag.
Clock
The serial clock can be selected from a choice of six internal clock sources or an external clock.
When an internal clock source is selected, pin SCK
240
Operation
Description
Clearing conditions:
After reading ABT = 1, cleared by writing 0 to ABT
Setting conditions:
When pin CS goes high during a transfer
Description
Read: Indicates that transfer is stopped
Write: Stops a transfer operation
Read: Indicates transfer in progress or waiting for CS input
Write: Starts a transfer operation
2
becomes the clock output pin.
(initial value)
(initial value)

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