HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 148

• Manufacturer Part Number: HD6473308RCP10V
• Description: MCU 5V 16K,PB-FREE 80-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/330r

Specifications of HD6473308RCP10V

• Core Size: 8-Bit
• Program Memory Size: 16KB (16K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 10MHz
• Number Of I /o: 58
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-PLCC
• No. Of I/o's: 58
• Ram Memory Size: 512Byte
• Cpu Speed: 10MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 2
• Digital Ic Case: RoHS Compliant
• Controller Family/series: H8/330
• Peripherals: ADC
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply (vcc/vdd): -
• Eeprom Size: -
• Data Converters: -
• Peripherals: -
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Bit 4
ICFD
Bit 3 – Output Compare Flag A (OCFA): This status flag is set to “1” when the FRC value
matches the OCRA value. This flag must be cleared by software. It is set by hardware, however,
and cannot be set by software.
Bit 3
OCFA
Bit 2 – Output Compare Flag B (OCFB): This status flag is set to “1” when the FRC value
matches the OCRB value. This flag must be cleared by software. It is set by hardware, however,
and cannot be set by software.
Bit 2
OCFB
Bit 1 – Timer Overflow Flag (OVF): This status flag is set to “1” when the FRC overflows
(changes from H’FFFF to H’0000). This flag must be cleared by software. It is set by hardware,
however, and cannot be set by software.
Bit 1
OVF
0
1
0
1
0
1
0
1
Description
To clear ICFD, the CPU must read ICFD after it
has been set to "1," then write a “0” in this bit.
This bit is set to 1 when an FTID input signal is received.
Description
To clear OCFA, the CPU must read OCFA after
it has been set to "1," then write a “0” in this bit.
This bit is set to 1 when FRC = OCRA.
Description
To clear OCFB, the CPU must read OCFB after
it has been set to "1," then write a “0” in this bit.
This bit is set to 1 when FRC = OCRB.
Description
To clear OVF, the CPU must read OVF after
it has been set to "1," then write a “0” in this bit.
This bit is set to 1 when FRC changes from H’FFFF to H’0000.
133
(Initial value)
(Initial value)
(Initial value)
(Initial value)