HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 266

MCU 5V 16K,PB-FREE 80-PLCC

HD6473308RCP10V

Manufacturer Part Number
HD6473308RCP10V
Description
MCU 5V 16K,PB-FREE 80-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/330r
Datasheet

Specifications of HD6473308RCP10V

Core Size
8-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
10MHz
Number Of I /o
58
Program Memory Type
OTP
Ram Size
512 x 8
Operating Temperature
-20°C ~ 75°C
Package / Case
80-PLCC
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
10MHz
No. Of Timers
3
No. Of Pwm Channels
2
Digital Ic Case
RoHS Compliant
Controller Family/series
H8/330
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply (vcc/vdd)
-
Eeprom Size
-
Data Converters
-
Peripherals
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473308RCP10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6473308RCP10V
Manufacturer:
ST
0
14.4.1 Transition to Software Standby Mode
To enter the software standby mode, set the standby bit (SSBY) in the system control register
(SYSCR) to “1,” then execute the SLEEP instruction.
14.4.2 Exit from Software Standby Mode
The chip can be brought out of the software standby mode by an input at one of six pins: NMI,
IRQ
(1) Recovery by External Interrupt: When an NMI, IRQ
received, the clock oscillator begins operating. After the waiting time set in the system control
register (bits STS2 to STS0), clock pulses are supplied to the CPU and on-chip supporting modules.
The CPU executes the interrupt-handling sequence for the requested interrupt, then returns to the
instruction after the SLEEP instruction. The SSBY bit is not cleared.
See Section 14.2, “System Control Register: Power-Down Control Bits” for information about the
STS bits.
Interrupts IRQ
IRQ
(2) Recovery by RES Pin: When the RES pin goes Low, the clock oscillator starts. Next, when
the RES pin goes High, the CPU begins executing the reset sequence. The SSBY bit is cleared to
“0.”
The RES pin must be held Low long enough for the clock to stabilize.
(3) Recovery by STBY Pin: When the STBY pin goes Low, the chip exits from the software
standby mode to the hardware standby mode.
14.4.3 Sample Application of Software Standby Mode
In this example the H8/330 enters the software standby mode when NMI goes Low and exits when
NMI goes High, as shown in Figure 14-1.
0
3
, IRQ
E to IRQ
1
, IRQ
7
3
E to "0" in the interrupt enable register (IER).
to IRQ
2
, RES, or STBY.
7
should be disabled before entry to the software standby mode. Clear
257
0
, IRQ
1
, or IRQ
2
request signal is

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