HD6473308RCP10V Renesas Electronics America, HD6473308RCP10V Datasheet - Page 199

MCU 5V 16K,PB-FREE 80-PLCC

HD6473308RCP10V

Manufacturer Part Number
HD6473308RCP10V
Description
MCU 5V 16K,PB-FREE 80-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/330r
Datasheet

Specifications of HD6473308RCP10V

Core Size
8-Bit
Program Memory Size
16KB (16K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
10MHz
Number Of I /o
58
Program Memory Type
OTP
Ram Size
512 x 8
Operating Temperature
-20°C ~ 75°C
Package / Case
80-PLCC
No. Of I/o's
58
Ram Memory Size
512Byte
Cpu Speed
10MHz
No. Of Timers
3
No. Of Pwm Channels
2
Digital Ic Case
RoHS Compliant
Controller Family/series
H8/330
Peripherals
ADC
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply (vcc/vdd)
-
Eeprom Size
-
Data Converters
-
Peripherals
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6473308RCP10V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD6473308RCP10V
Manufacturer:
ST
0
Bit 4 – Receive Enable (RE): This bit enables or disables the receive function. When the receive
function is enabled, the ARxD or CRxD pin is automatically used for input. When the receive
function is disabled, the ARxD or CRxD pin is available as a general-purpose I/O port.
Bit 4
RE
Bits 3 and 2 – Reserved: These bits cannot be modified and are always read as “1.”
Bit 1 – Clock Enable 1 (CKE1): This bit selects the internal or external clock source for the baud
rate generator. When the external clock source is selected, the ASCK or CSCK pin is automatically
used for input of the external clock signal.
Bit 1
CKE1
Bit 0 – Clock Enable 0 (CKE0): When an internal clock source is used in asynchronous mode,
this bit enables or disables serial clock output at the ASCK pin.
This bit is ignored when the external clock is selected, or when the synchronous mode is selected.
Bit 0
CKE0
For further information on clock source selection, see Table 9-6 in Section 9.3, “Operation.”
0
1
0
1
0
1
Description
The receive function is disabled. The ARxD and CRxD pins can be
used for general-purpose I/O.
The receive function is enabled. When C/A = 0, the ARxD pin is used
for input. When C/A = 1, the CRxD pin is used for input.
Description
Internal clock source. (When C/A = 1, the CSCK pin is used
External clock source. (When C/A = 1, the CSCK pin is used
for input. When C/A = 0, the ASCK pin is used for input.)
Description
The ASCK pin is not used by the SCI (and is available as
a general-purpose I/O port).
The ASCK pin is used for serial clock output.
for output.)
186
(Initial value)
(Initial value)
(Initial value)

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