HD6417750SF167V Renesas Electronics America, HD6417750SF167V Datasheet - Page 66

• Manufacturer Part Number: HD6417750SF167V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF167V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 167MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Figure 4.2
Figure 4.3
Figure 4.4
Figure 4.5
Figure 4.6
Figure 4.7
Figure 4.8
Figure 4.9
Figure 4.10 Memory-Mapped OC Address Array..................................................................... 135
Figure 4.11 Memory-Mapped OC Data Array .......................................................................... 136
Figure 4.12 Memory-Mapped IC Address Array ...................................................................... 138
Figure 4.13 Memory-Mapped IC Data Array ............................................................................ 139
Figure 4.14 Memory-Mapped OC Address Array..................................................................... 140
Figure 4.15 Memory-Mapped OC Data Array .......................................................................... 141
Figure 4.16 Store Queue Configuration..................................................................................... 143
Section 5 Exceptions
Figure 5.1
Figure 5.2
Figure 5.3
Section 6 Floating-Point Unit (FPU)
Figure 6.1
Figure 6.2
Figure 6.3
Figure 6.4
Section 8 Pipelining
Figure 8.1
Figure 8.2
Figure 8.3
Section 9 Power-Down Modes
Figure 9.1
Figure 9.2
Figure 9.3
Figure 9.4
Figure 9.5
Figure 9.6
Figure 9.7
Rev.7.00 Oct. 10, 2008 Page lxiv of lxxxiv
REJ09B0366-0700
Configuration of Operand Cache (SH7750, SH7750S).......................................... 117
Configuration of Operand Cache (SH7750R) ........................................................ 118
Configuration of Write-Back Buffer ...................................................................... 122
Configuration of Write-Through Buffer................................................................. 122
Configuration of Instruction Cache (SH7750, SH7750S) ...................................... 128
Configuration of Instruction Cache (SH7750R)..................................................... 129
Memory-Mapped IC Address Array ...................................................................... 132
Memory-Mapped IC Data Array ............................................................................ 133
Register Bit Configurations.................................................................................... 150
Instruction Execution and Exception Handling...................................................... 155
Example of General Exception Acceptance Order................................................. 157
Format of Single-Precision Floating-Point Number............................................... 185
Format of Double-Precision Floating-Point Number ............................................. 186
Single-Precision NaN Bit Pattern........................................................................... 188
Floating-Point Registers......................................................................................... 190
Basic Pipelines ....................................................................................................... 232
Instruction Execution Patterns................................................................................ 233
Examples of Pipelined Execution........................................................................... 245
STATUS Output in Power-On Reset ..................................................................... 276
STATUS Output in Manual Reset.......................................................................... 276
STATUS Output in Standby → Interrupt Sequence............................................... 277
STATUS Output in Standby → Power-On Reset Sequence .................................. 277
STATUS Output in Standby → Manual Reset Sequence ...................................... 278
STATUS Output in Sleep → Interrupt Sequence................................................... 279
STATUS Output in Sleep → Power-On Reset Sequence ...................................... 279