M37542F8FP Renesas Electronics America, M37542F8FP Datasheet - Page 54

• Manufacturer Part Number: M37542F8FP
• Description: IC 740 MCU FLASH 32K 36SSOP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M37542F8FP

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SIO, UART/USART
• Peripherals: POR, WDT
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 36-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

7542 Group
Serial I/O2 can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer is also provided for
baud rate generation.
Fig. 63 Block diagram of clock synchronous serial I/O2
Fig. 64 Operation of clock synchronous serial I/O2 function
Rev.3.03
REJ03B0006-0303
Write pulse to receive/transmit
buffer register 2 (address 002E
Serial I/O2
Receive enable signal S
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
P 0
P 0
Notes 1: As the transmit interrupt (TI), which can be selected, either when the transmit buffer has emptied (TBE=1) or after
P 0
P 0
6
7
5
4
/ S
/ S
/ T
/ R
C L K 2
R D Y 2
X
X
D
2: If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial
3: The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” .
X
Jul 11, 2008
Serial output TxD
D
Serial input RxD
2
I N
2
the transmit shift operation has ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the
serial I/O2 control register.
data is output continuously from the TxD
B R G c o u n t s o u r c e s e l e c t i o n b i t
RDY2
F / F
2
2
16
Page 52 of 117
)
TBE = 0
1 / 4
F a l l i n g - e d g e d e t e c t o r
TBE = 1
TSC = 0
R e c e i v e b u f f e r r e g i s t e r 2
D
D
R e c e i v e s h i f t r e g i s t e r 2
0
0
2
T r a n s m i t b u f f e r r e g i s t e r 2
pin.
T r a n s m i t s h i f t r e g i s t e r 2
D a t a b u s
D a t a b u s
D
D
1
1
A d d r e s s 0 0 2 E
B a u d r a t e g e n e r a t o r 2
S h i f t c l o c k
S e r i a l I / O 2 s y n c h r o n o u s
c l o c k s e l e c t i o n b i t
F r e q u e n c y d i v i s i o n r a t i o 1 / ( n + 1 )
A d d r e s s 0 0 2 E
S h i f t c l o c k
A d d r e s s 0 0 3 2
D
D
2
2
(1) Clock Synchronous Serial I/O2 Mode
Clock synchronous serial I/O2 mode can be selected by setting
the serial I/O2 mode selection bit of the serial I/O2 control register
(bit 6) to “1”.
For clock synchronous serial I/O2, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB.
1 6
C l o c k c o n t r o l c i r c u i t
1 6
D
D
C l o c k c o n t r o l c i r c u i t
1 6
3
3
S e r i a l I / O 2 c o n t r o l r e g i s t e r
T r a n s m i t i n t e r r u p t s o u r c e s e l e c t i o n b i t
R e c e i v e b u f f e r f u l l f l a g ( R B F )
S e r i a l I / O 2 s t a t u s r e g i s t e r
1 / 4
D
D
4
4
R e c e i v e i n t e r r u p t r e q u e s t ( R I )
D
D
T r a n s m i t s h i f t c o m p l e t i o n f l a g ( T S C )
5
5
T r a n s m i t b u f f e r e m p t y f l a g ( T B E )
T r a n s m i t i n t e r r u p t r e q u e s t ( T I )
D
D
6
6
A d d r e s s 0 0 3 0
Overrun error (OE)
detection
A d d r e s s 0 0 2 F
RBF = 1
TSC = 1
D
D
7
7
1 6
1 6