MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 107

• Manufacturer Part Number: MC68HC908LB8CPE
• Description: IC MCU 8K FLASH 8MHZ 20DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908LB8CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVR, POR, PWM
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

DC[10:0] — 11-Bit Duty Cycle Value
STEP[4:0] — 5-Bit Dithering Step Value
10.8.3 HRP Period Registers
The two read/write period registers contain the 16-bit period of the PWM output after dithering. It is split
into two parts:
The output period including dithering in variable frequency mode is:
where 2
The output period in variable duty cycle mode does not include dithering. The period value is:
Writes to the high byte (HRPPERH) are stored in a latch until the low byte (HRPPERL) is written. Both
registers are then updated simultaneously. This prevents glitches in the output period.
Freescale Semiconductor
1. 11-bit period value (P[10:0]) used to generate the HRP’s output waveforms.
2. 5-bit step value (STEP[4:0]) the lower five bits of HRPPERH:HRPPERL, specifies how much time
is spent on the longer period (PERIOD2).
SEL[2:0]
Address: HRPDCH — $0052
Address: HRPPERH — $0054
is the STEP[4:0] scaling factor.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Output Period (seconds)
Figure 10-11. HRP Duty Cycle Registers (HRPDCH:HRPDCL)
Figure 10-12. HRP Period Registers (HRPPERH:HRPPERL)
Bit 15
DC10
Bit 15
Bit 7
DC2
Bit 7
P10
0
0
0
DC9
DC1
P9
14
14
0
0
0
6
6
HRPDCL — $0053
MC68HC908LB8 Data Sheet, Rev. 1
Period
HRPPERL — $0055
DC8
DC0
P8
13
13
0
5
0
0
5
=
=
----------------------- -
HRPCLK
P 10:0
------------------------- -
HRPCLK
[
P[10:0]
STEP4
DC7
P7
12
12
0
4
0
0
4
]
+
------------------------------------------------- -
------------------ -
2
INT
SEL[2:0]
32
STEP3
DC6
P6
11
11
0
0
⎛
⎝
0
3
3
STEP 4:0
---------------------------- -
2
¥
SEL[2:0]
HRPCLK
[
STEP2
DC5
P5
10
10
0
0
0
2
2
]
⎞
⎠
STEP1
DC4
P4
0
0
0
9
1
9
1
STEP0
Bit 8
DC3
Bit 0
Bit 8
Bit 0
P3
0
0
0
HRP Registers
(EQ 10-12)
(EQ 10-13)
107