MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 136

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MC68HC908LB8CPE

Manufacturer Part Number
MC68HC908LB8CPE
Description
IC MCU 8K FLASH 8MHZ 20DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LB8CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVR, POR, PWM
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LB8CPE
Manufacturer:
IR
Quantity:
10
Input/Output (I/O) Ports
14.2.3 Port A Input Pullup Enable Register
The port A input pullup enable register (PTAPUE) contains a software configurable pullup device for each
of the seven port A pins. Each bit is individually configurable and requires that the data direction register,
DDRA, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRA is configured for output mode.
PTA6PUE–PTA0PUE — Port A Input Pullup Enable Bits
14.3 Port B
Port B is an 8-bit special-function port that shares all eight of its pins with the high resolution PWM (HRP),
pulse-width modulator (PWM) module, and op amp/comparator module. See
for a description of the priority of these functions.
14.3.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the eight port pins.
PTB7–PTB0 — Port B Data Bits
136
NOTES:
1. X = Don’t care
2. I/O pin pulled up to V
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
These writable bits are software programmable to enable pullup devices on an input port bit.
These read/write bits are software-programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
1 = Corresponding port A pin configured to have internal pullup
0 = Corresponding port A pin has internal pullup disconnected
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 14-5. Port A Input Pullup Enable Register (PTAPUE)
DD
$000D
$0001
PTB7
by internal pullup device
Bit 7
Bit 7
-
PTA6PUE
Figure 14-6. Port B Data Register (PTB)
PTB6
6
0
6
MC68HC908LB8 Data Sheet, Rev. 1
PTA5PUE
PTB5
5
0
5
PTA4PUE
Unaffected by reset
PTB4
4
0
4
PTA3PUE
PTB3
3
0
3
PTA2PUE
PTB2
2
0
2
PTA1PUE
PTB1
Table 1-1 . Pin Functions
1
0
1
Freescale Semiconductor
PTA0PUE
PTB0
Bit 0
Bit 0
0

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