MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 36

• Manufacturer Part Number: MC68HC908LB8CPE
• Description: IC MCU 8K FLASH 8MHZ 20DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HC908LB8CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVR, POR, PWM
• Number Of I /o: 18
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 7x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Memory
Before processing an interrupt, the CPU uses five bytes of the stack to save the contents of the CPU
registers.
During a subroutine call, the CPU uses two bytes of the stack to store the return address. The stack
pointer decrements during pushes and increments during pulls.
2.6 FLASH Memory (FLASH)
This section describes the operation of the embedded FLASH memory. This memory can be read,
programmed, and erased from a single external supply. The program, erase, and read operations are
enabled through the use of an internal charge pump. It is recommended that the user utilize the FLASH
programming routines provided in the on-chip ROM, which are described more fully in a separate
Freescale Semiconductor application note.
The FLASH memory is an array of 8 Kbytes with an additional 34 bytes of user vectors and one byte of
block protection. An erased bit reads as 1 and a programmed bit reads as a 0. Memory in the FLASH
array is organized into two rows per page basis. For the 8-K word by 8-bit embedded FLASH memory,
the page size is 64 bytes per page and the row size is 32 bytes per row. Hence the minimum erase page
size is 64 bytes and the minimum program row size is 32 bytes. Program and erase operations are
facilitated through control bits in FLASH control register (FLCR). Details for these operations appear later
in this section.
The address ranges for the user memory and vectors are:
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$DE00–$FDFF; user memory
$FE08
$FF7E; FLASH block protect register
$FFDE–$FFFF; these locations are reserved for user-defined interrupt and reset vectors
;
FLASH control register
For correct operation, the stack pointer must point only to RAM locations.
For M6805 compatibility, the H register is not stacked.
Be careful when using nested subroutines. The CPU may overwrite data in
the RAM during a subroutine or during the interrupt stacking operation.
MC68HC908LB8 Data Sheet, Rev. 1
NOTE
NOTE
NOTE
Freescale Semiconductor