MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 37

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MC68HC908LB8CPE

Manufacturer Part Number
MC68HC908LB8CPE
Description
IC MCU 8K FLASH 8MHZ 20DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LB8CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVR, POR, PWM
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LB8CPE
Manufacturer:
IR
Quantity:
10
Programming tools are available from Freescale Semiconductor. Contact your local Freescale
Semiconductor representative for more information.
2.6.1 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase operations.
HVEN — High-Voltage Enable Bit
MASS — Mass Erase Control Bit
ERASE — Erase Control Bit
PGM — Program Control Bit
2.6.2 FLASH Page Erase Operation
Use this step-by-step procedure to erase a page (64 bytes) of FLASH memory to read as logic 1. A page
consists of 64 consecutive bytes starting from addresses $XX00, $XX40, $XX80, or $XXC0. The 34-byte
user interrupt vectors area also forms a page. Any FLASH memory page can be erased alone, except for
the 34-byte interrupt vectors page, which must be mass erased.
1. No security feature is absolutely secure. However, Freescale Semiconductor’s strategy is to make reading or copying the
Freescale Semiconductor
FLASH difficult for unauthorized users.
This read/write bit enables the charge pump to drive high voltages for program and erase operations
in the array. HVEN can only be set if either PGM = 1 or ERASE = 1 and the proper sequence for
program or erase is followed.
Setting this read/write bit configures the 8-Kbyte FLASH array for mass erase operation.
This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit
such that both bits cannot be equal to 1 or set to 1 at the same time.
This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE
bit such that both bits cannot be equal to 1 or set to 1 at the same time.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
1 = MASS erase operation selected
0 = PAGE erase operation selected
1 = Erase operation selected
0 = Erase operation unselected
1 = Program operation selected
0 = Program operation unselected
Address:
A security feature prevents viewing of the FLASH contents.
Reset:
Read:
Write:
$FE08
Bit 7
0
0
Figure 2-3. FLASH Control Register (FLCR)
= Unimplemented
6
0
0
MC68HC908LB8 Data Sheet, Rev. 1
5
0
0
NOTE
4
0
0
HVEN
3
0
MASS
2
0
(1)
ERASE
1
0
FLASH Memory (FLASH)
PGM
Bit 0
0
37

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