MC68HC908LB8CPE Freescale Semiconductor, MC68HC908LB8CPE Datasheet - Page 165

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MC68HC908LB8CPE

Manufacturer Part Number
MC68HC908LB8CPE
Description
IC MCU 8K FLASH 8MHZ 20DIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908LB8CPE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVR, POR, PWM
Number Of I /o
18
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 7x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC908LB8CPE
Manufacturer:
IR
Quantity:
10
16.2.4 System Integration Module (SIM) Reset Status Register
This read-only register contains flags to show reset sources. All flag bits are automatically cleared
following a read of the register. Reset service can read the SIM reset status register to clear the register
after power-on reset and to determine the source of any subsequent reset.
The register is initialized on power-up as shown with the POR bit set and all other bits cleared. During a
POR or any other internal reset, the RST pin is pulled low as long as pin PTA5/RST/KB5 is configured for
reset operation.
POR — Power-On Reset Flag
PIN — External Reset Flag
COP — Computer Operating Properly Reset Bit
ILOP — Illegal Opcode Reset Bit
ILAD — Illegal Address Reset Bit
MODRST — Monitor Mode Entry Module Reset Bit
LVI — Low-Voltage Inhibit Reset Bit
Freescale Semiconductor
1 = Power-on reset since last read of SRSR
0 = Read of SRSR since last power-on reset
1 = External reset via RST pin since last read of SRSR
0 = POR or read of SRSR since last external reset
1 = Last reset caused by timeout of COP counter
0 = POR or read of SRSR since any reset
1 = Last reset caused by an illegal opcode
0 = POR or read of SRSR since any reset
1 = Last reset caused by an opcode fetch from an illegal address
0 = POR or read of SRSR since any reset
1 = Last reset caused by forced monitor mode entry.
0 = POR or read of SRSR since any reset
1 = Last reset caused by low-power supply voltage
0 = POR or read of SRSR since any reset
Address:
Only a read of the SIM reset status register clears all reset flags. After
multiple resets from different sources without reading the register, multiple
flags remain set.
Read:
Write:
POR:
$FE01
POR
Bit 7
1
Figure 16-2. SIM Reset Status Register (SRSR)
= Unimplemented
PIN
6
0
MC68HC908LB8 Data Sheet, Rev. 1
COP
5
0
NOTE
ILOP
4
0
ILAD
3
0
MODRST
2
0
LVI
1
0
Bit 0
0
0
Resets
165

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