C8051F537-IM Silicon Laboratories Inc, C8051F537-IM Datasheet - Page 21

IC 8051 MCU 2K FLASH 20QFN

C8051F537-IM

Manufacturer Part Number
C8051F537-IM
Description
IC 8051 MCU 2K FLASH 20QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F53xr
Datasheets

Specifications of C8051F537-IM

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-QFN
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1400

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F537-IM
Manufacturer:
Silicon Labs
Quantity:
135
1.4. Operating Modes
The C8051F52x/F52xA/F53x/F53xA devices have four operating modes: Active (Normal), Idle, Suspend,
and Stop. Active mode occurs during normal operation when the oscillator and peripherals are active. Idle
mode halts the CPU while leaving the peripherals and internal clocks active. In Suspend and Stop mode,
the CPU is halted, all interrupts and timers are inactive, and the internal oscillator is stopped. The various
operating modes are described in Table 1.3 below:
Table 1.3. Operating Modes Summary
See Section “8.3. Power Management Modes” on page 89 for Idle and Stop mode details. See Section
“14.1.1. Internal Oscillator Suspend Mode” on page 135 for more information on Suspend mode.
Suspend
Active
Stop
Idle
SYSCLK active
CPU active (accessing Flash)
Peripherals active or inactive
depending on user settings
SYSCLK active
CPU inactive (not accessing
Flash)
Peripherals active or inactive
depending on user settings
Internal oscillator inactive
If SYSCLK is derived from the
internal oscillator, the peripherals
and the CIP-51 will be stopped
SYSCLK inactive
CPU inactive (not accessing
Flash)
Digital peripherals inactive;
analog peripherals active or
inactive depending on user
settings
Properties
C8051F52x/F52xA/F53x/F53xA
Rev. 1.3
Consumption
Less than Full
Very low
Power
Low
Full
(OSCICN.5)
SUSPEND
Entered?
(PCON.0)
(PCON.1)
STOP
IDLE
How
Comparator 0 enabled
Any enabled interrupt
and output is logic 0
Port 0 event match
Port 1 event match
or device reset
How Exited?
Device Reset
21

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