C8051F537-IM Silicon Laboratories Inc, C8051F537-IM Datasheet - Page 23

• Manufacturer Part Number: C8051F537-IM
• Description: IC 8051 MCU 2K FLASH 20QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F53xr

Specifications of C8051F537-IM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.25 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-QFN
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.25 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 336-1400

1.7. Voltage Regulator
C8051F52x/F52xA/F53x/F53xA devices include an on-chip low dropout voltage regulator (REG0). The
input to REG0 at the V
2.6 V. When enabled, the output of REG0 powers the device and drives the V
can be used to power external devices connected to V
1.8. Serial Port
The C8051F52x/F52xA/F53x/F53xA family includes a full-duplex UART with enhanced baud rate configu-
ration, and an Enhanced SPI interface. Each of the serial buses is fully implemented in hardware and
makes extensive use of the CIP-51's interrupts, thus requiring very little CPU intervention.
Port I/O
Pins
REGIN
pin can be as high as 5.25 V. The output can be selected by software to 2.1 or
Figure 1.8. Comparator Block Diagram
+
-
VDD
GND
C8051F52x/F52xA/F53x/F53xA
Decision
Reset
Rev. 1.3
Tree
DD
(SYNCHRONIZER)
D
SET
CLR
.
Q
Q
D
SET
CLR
Interrupt
Q
Q
Logic
DD
pin. The voltage regulator
(asynchronous output)
(synchronous output)
CP0A
CP0
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