C8051F537-IM Silicon Laboratories Inc, C8051F537-IM Datasheet - Page 39

IC 8051 MCU 2K FLASH 20QFN

C8051F537-IM

Manufacturer Part Number
C8051F537-IM
Description
IC 8051 MCU 2K FLASH 20QFN
Manufacturer
Silicon Laboratories Inc
Series
C8051F53xr
Datasheets

Specifications of C8051F537-IM

Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.25 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-QFN
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.25 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
336-1400

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F537-IM
Manufacturer:
Silicon Labs
Quantity:
135
Table 3.3. DFN-10 Landing Diagram Dimensions
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This land pattern design is based on the IPC-7351 guidelines.
3. All metal pads are to be non-solder mask defined (NSMD). Clearance
4. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
5. The stencil thickness should be 0.125 mm (5 mils).
6. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter
7. A 4x1 array of 1.60 x 0.45 mm openings on 0.65 mm pitch should be used for
8. A No-Clean, Type-3 solder paste is recommended.
9. The recommended card reflow profile is per the JEDEC/IPC J-STD-020
between the solder mask and the metal pad is to be 60 µm minimum, all the
way around the pad.
should be used to assure good solder paste release.
pads.
the center ground pad.
specification for Small Body Components.
Dimension
C1
X1
X2
Y1
Y2
E
Figure 3.2. DFN-10 Landing Diagram
C8051F52x/F52xA/F53x/F53xA
Rev. 1.3
2.90
0.20
1.70
0.70
2.45
Min
0.50 BSC.
Max
3.00
0.30
1.80
0.80
2.55
39

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