MCF5272VF66 Freescale Semiconductor, MCF5272VF66 Datasheet - Page 108
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MCF5272VF66
Manufacturer Part Number
MCF5272VF66
Description
IC MPU 32BIT 66MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272VF66
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Local Memory
4.4.2.2
Depending on the ROMBAR configuration, memory accesses can be sent to the ROM module and the
cache simultaneously. If an access hits both, the ROM module sources read data and the instruction cache
access is discarded. Because the ROM contains only for data, setting ROMBAR[SC,UC] lowers power
dissipation by disabling the ROM during instruction fetches.
Table 4-5
RAMBAR can be configured similarly, as described in
Power
4-6
31–14
13–6
Bits
5–1
0
Management.”
C/I, SC,
SD, UC,
Name
shows typical ROMBAR settings:
UD
BA
—
V
Programming ROMBAR for Power Management
Base address. Defines the ROM module base address. ROM can reside on any 16-Kbyte boundary in the
4-Gbyte address space.
Reserved, should be cleared.
Address space masks (ASn). Allows specific address spaces to be enabled or disabled, placing internal
modules in a specific address space. If an address space is disabled, an access to the register in that
address space becomes an external bus access, and the module resource is not accessed. These bits are
useful for power management as described in
Management.” In particular, C/I is typically set.
The address space mask bits are follows:
C/I = CPU space/interrupt acknowledge cycle mask. Note that C/I must be set if BA = 0.
SC = Supervisor code address space mask
SD = Supervisor data address space mask
UC = User code address space mask
UD = User data address space mask
For each ASn bit:
0 An access to the ROM module can occur for this address space
1 Disable this address space from the ROM module. References to this address space cannot access the
Valid. Indicates whether ROMBAR contents are valid. The BA value is not used and the ROM module is not
accessible until V is set.
0 Contents of ROMBAR are not valid.
1 Contents of ROMBAR are valid.
ROM module and are processed like other non-ROM references.
MCF5272 ColdFire
Table 4-5. Examples of Typical ROMBAR Settings
Instructions only
Data only
Both instructions and data
Data Contained In ROM
Table 4-4. ROMBAR Field Description
®
Integrated Microprocessor User’s Manual, Rev. 3
Section 4.4.2.2, “Programming ROMBAR for Power
Description
Section 4.3.2.3, “Programming RAMBAR for
ROMBAR[7–0]
0x2B
0x35
0x21
Freescale Semiconductor
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