MCF5272VF66 Freescale Semiconductor, MCF5272VF66 Datasheet - Page 156
![IC MPU 32BIT 66MHZ 196-MAPBGA](/photos/13/94/139412/mcf5272vf66_sml.jpg)
MCF5272VF66
Manufacturer Part Number
MCF5272VF66
Description
IC MPU 32BIT 66MHZ 196-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF527xr
Specifications of MCF5272VF66
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
Peripherals
DMA, WDT
Number Of I /o
32
Program Memory Size
16KB (4K x 32)
Program Memory Type
ROM
Ram Size
1K x 32
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
196-MAPBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
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Debug Support
5-38
Instruction
movem.l
movem.l
move.w
move.w
move.w
msac.w
msac.w
move.b
mulu.w
muls.w
mac.w
mac.w
mac.w
move.l
move.l
move.l
move.l
move.l
move.l
move.l
move.l
moveq
msac.l
msac.l
muls.l
mulu.l
negx.l
mac.l
mac.l
mac.l
pulse
neg.l
not.l
nop
pea
ori.l
lsl.l
lsr.l
or.l
or.l
Table 5-22. PST/DDATA Specification for User-Mode Instructions (continued)
Operand Syntax
{Dy,#imm},CCR
<ea>y,MACSR
{Dy,#imm},Dx
{Dy,#imm},Dx
MACSR,CCR
Ry,Rx,ea,Rw
Ry,Rx,ea,Rw
<ea>y,<ea>x
<ea>y,<ea>x
<ea>y,MASK
<ea>y,<ea>x
Ry,Rx,ea,Rw
Ry,Rx,ea,Rw
<ea>y,ACC
MACSR,Rx
#list,<ea>x
<ea>y,#list
MASK,Rx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
<ea>y,Dx
Dy,<ea>x
#imm,Dx
#imm,Dx
CCR,Dx
ACC,Rx
MCF5272 ColdFire
<ea>y
Ry,Rx
Ry,Rx
Ry,Rx
Ry,Rx
Dx
Dx
Dx
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0x9, DD = source}, {PST = 0x9, DD = destination}
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = destination},...
PST = 0x1, {PST = 0xB, DD = source},...
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1, {PST = 0x9, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1, {PST = 0xB, DD = destination operand}
PST = 0x4
PST = 0x1, {PST = 0x8, DD = source}, {PST = 0x8, DD = destination}
PST = 0x1, {PST = 0xB, DD = source}, {PST = 0xB, DD = destination}
PST = 0x1
PST = 0x1
PST = 0x1
PST = 0x1, {PST = 0xB, DD = source operand}
PST = 0x1, {PST = 0x9, DD = source operand}
PST = 0x1
®
Integrated Microprocessor User’s Manual, Rev. 3
PST/DDATA
2
2
Freescale Semiconductor
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