MCZ33904B3EK Freescale Semiconductor, MCZ33904B3EK Datasheet - Page 66

IC SBC CAN HS 3.3V 32SOIC

MCZ33904B3EK

Manufacturer Part Number
MCZ33904B3EK
Description
IC SBC CAN HS 3.3V 32SOIC
Manufacturer
Freescale Semiconductor
Type
High Speed CAN Interfacer
Datasheets

Specifications of MCZ33904B3EK

Operating Supply Voltage
3.3 V
Supply Current
2 mA
Package / Case
SOIC-32
Mounting Style
SMD/SMT
Product
CAN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCZ33904B3EKR2
Manufacturer:
FREESCA
Quantity:
4 975
COMPLETE SPI OPERATION
options. Both MOSI and MISO information are described.
is selected and parity = 1.
PARITY BIT 8
Calculation
15,14 = 01). It is calculated based on the number of logic one
contained in bits 15-9,7-0 sequence (this is the entire 16 bits
of the write command except bit 8).
Examples 1:
because the command contains 7 bits with logic 1.
66
33903/4/5
Table 14. SPI Capabilities with Options
SERIAL PERIPHERAL INTERFACE
DETAIL OPERATION
Read back of “device control bits” (MOSI bit 7 = 0)
Write device control bit to address selected by bits
register address (bit 13-9), and sub address (bit 7).
Read specific device information (MOSI bit 7 = 1)
MISO return fixed device status (bit 15-8) + flags
from the selected address and sub-address.
Read device flags and Wake-up flags, from
Table 14
Note:
The parity is used for the write-to-register command (bit
Bit 8 must be set to 0 if the number of 1 is odd.
Bit 8 must be set to 1if the number of 1 is even.
MOSI [bit 15-0] = 01 00 011 P 01101001, P should be 0,
MISO return 16 bits device status
P = 0 if parity bit is not selected or parity = 0. P = 1 if parity
Type of Command
is a compiled view of all the SPI capabilities and
Reserved
(13-9).
OR
MOSI/
MISO
MOSI
MISO
MOSI
MISO
MOSI
MISO
MOSI
MISO
MISO
MOSI
MISO
MOSI
Control bits
[15-14]
00
00
01
10
11
11
Device Fixed Status (8 bits)
Device Fixed Status (8 bits)
Device Fixed Status (8 bits)
Device Fixed Status (8 bits)
Device Fixed Status (8 bits)
Address
address
address
address
address
address
[13-9]
Examples 2:
because the command contains 4 bits with logic 1.
Parity Function Selection
functions.
MISC register.
then Parity bits in all SPI commands (bit 8) must be “0”.
All SPI commands and examples do not use parity
Thus the Exact command will then be:
MOSI [bit 15-0] = 01 00 011 0 01101001
MOSI [bit 15-0] = 01 00 011 P 0100 0000, P should be 1,
Thus the Exact command will then be:
MOSI [bit 15-0] = 01 00 011 1 0100 0000
The parity function is optional. It is selected by bit 6 in INIT
If parity function is not selected (bit 6 of INIT MISC = 0),
Parity/Next
Reserved
bits [8]
(note)
1
1
1
Reserved
Bit 7
0
1
0
1
Analog Integrated Circuit Device Data
Reserved
Read of device flags form a register address,
Read of device flags form a register address,
Device Extended Status (8 bits)
Register control bits content
Device ID and I/Os state
and sub address HIGH (bit 7)
and sub address LOW (bit 7)
Control bits
Freescale Semiconductor
Flags
Flags
Bits [6-0]
000 0000
000 0000

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