DSPIC30F6010AT-20E/PT Microchip Technology, DSPIC30F6010AT-20E/PT Datasheet - Page 170

• Manufacturer Part Number: DSPIC30F6010AT-20E/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010AT-20E/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERXLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC30F6010A/6015
TABLE 22-2:
DS70150D-page 170
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Base
Instr
#
EXCH
FBCL
FF1L
FF1R
GOTO
INC
INC2
IOR
LAC
LNK
LSR
MAC
MOV
MOVSAC
MPY
MPY.N
MSC
MUL
Mnemonic
Assembly
EXCH
FBCL
FF1L
FF1R
GOTO
GOTO
INC
INC
INC
INC2
INC2
INC2
IOR
IOR
IOR
IOR
IOR
LAC
LNK
LSR
LSR
LSR
LSR
LSR
MAC
MAC
MOV
MOV
MOV
MOV
MOV.b
MOV
MOV
MOV
MOV.D
MOV.D
MOV.D
MOVSAC
MPY
MPY
MPY.N
MSC
MUL.SS
MUL.SU
MUL.US
MUL.UU
MUL.SU
MUL.UU
MUL
INSTRUCTION SET OVERVIEW (CONTINUED)
Wns,Wnd
Ws,Wnd
Ws,Wnd
Ws,Wnd
Expr
Wn
f
f,WREG
Ws,Wd
f
f,WREG
Ws,Wd
f
f,WREG
#lit10,Wn
Wb,Ws,Wd
Wb,#lit5,Wd
Wso,#Slit4,Acc
#lit14
f
f,WREG
Ws,Wd
Wb,Wns,Wnd
Wb,#lit5,Wnd
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd,
AWB
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd
f,Wn
f
f,WREG
#lit16,Wn
#lit8,Wn
Wn,f
Wso,Wdo
WREG,f
Wns,Wd
Ws,Wnd
Ws,Wnd
Acc,Wx,Wxd,Wy,Wyd,AWB
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd
Wm*Wn,Acc,Wx,Wxd,Wy,Wyd
Wm*Wm,Acc,Wx,Wxd,Wy,Wyd,
AWB
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,#lit5,Wnd
Wb,#lit5,Wnd
f
Assembly Syntax
Swap Wns with Wnd
Find Bit Change from Left (MSb) Side
Find First One from Left (MSb) Side
Find First One from Right (LSb) Side
Go to address
Go to indirect
f = f + 1
WREG = f + 1
Wd = Ws + 1
f = f + 2
WREG = f + 2
Wd = Ws + 2
f = f .IOR. WREG
WREG = f .IOR. WREG
Wd = lit10 .IOR. Wd
Wd = Wb .IOR. Ws
Wd = Wb .IOR. lit5
Load Accumulator
Link Frame Pointer
f = Logical Right Shift f
WREG = Logical Right Shift f
Wd = Logical Right Shift Ws
Wnd = Logical Right Shift Wb by Wns
Wnd = Logical Right Shift Wb by lit5
Multiply and Accumulate
Square and Accumulate
Move f to Wn
Move f to f
Move f to WREG
Move 16-bit literal to Wn
Move 8-bit literal to Wn
Move Wn to f
Move Ws to Wd
Move WREG to f
Move Double from W(ns):W(ns + 1) to Wd
Move Double from Ws to W(nd + 1):W(nd)
Move Double from Ws to W(nd + 1):W(nd)
Prefetch and store Accumulator
Multiply Wm by Wn to Accumulator
Square Wm to Accumulator
-(Multiply Wm by Wn) to Accumulator
Multiply and Subtract from Accumulator
{Wnd + 1, Wnd} = signed(Wb) * signed(Ws)
{Wnd + 1, Wnd} = signed(Wb) * unsigned(Ws)
{Wnd + 1, Wnd} = unsigned(Wb) * signed(Ws)
{Wnd + 1, Wnd} = unsigned(Wb) * unsigned(Ws)
{Wnd + 1, Wnd} = signed(Wb) * unsigned(lit5)
{Wnd + 1, Wnd} = unsigned(Wb) * unsigned(lit5)
W3:W2 = f * WREG
Description
© 2008 Microchip Technology Inc.
words
# of
1
1
1
1
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
cycles
# of
1
1
1
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
1
1
1
1
1
1
1
1
1
1
1
1
None
None
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
C,DC,N,OV,Z
N,Z
N,Z
N,Z
N,Z
N,Z
OA,OB,OAB,
SA,SB,SAB
None
C,N,OV,Z
N,Z
N,Z
OA,OB,OAB,
SA,SB,SAB
SA,SB,SAB
None
N,Z
N,Z
None
None
None
None
N,Z
None
None
None
None
OA,OB,OAB,
SA,SB,SAB
OA,OB,OAB,
SA,SB,SAB
OA,OB,OAB,
SA,SB,SAB
None
None
None
None
None
None
None
C
C
C
None
C,N,OV,Z
C,N,OV,Z
OA,OB,OAB,
None
Status Flags
Affected