DSPIC30F6010AT-20E/PT Microchip Technology, DSPIC30F6010AT-20E/PT Datasheet - Page 225

• Manufacturer Part Number: DSPIC30F6010AT-20E/PT
• Description: IC,DSP,16-BIT,CMOS,TQFP,80PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6010AT-20E/PT

• Rohs Compliant: YES
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-TFQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300019 - BOARD DEMO DSPICDEM 80L STARTERXLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Interrupt Priority ................................................................. 42
Interrupt Sequence ............................................................ 45
Interrupts ............................................................................ 41
I
I
I
I
I
M
Memory Organization ......................................................... 23
Microchip Internet Web Site ............................................. 228
Modulo Addressing ............................................................ 36
Motor Control PWM Module ............................................... 95
MPLAB ASM30 Assembler, Linker, Librarian .................. 174
MPLAB ICD 2 In-Circuit Debugger .................................. 175
MPLAB ICE 2000 High-Performance Universal
In-Circuit Emulator ........................................................... 175
MPLAB Integrated Development Environment
Software ........................................................................... 173
MPLAB PM3 Device Programmer ................................... 175
MPLAB REAL ICE In-Circuit Emulator System ................ 175
MPLINK Object Linker/MPLIB Object Librarian ............... 174
O
Operating Current (I
Oscillator
Oscillator Configurations .................................................. 152
© 2008 Microchip Technology Inc.
2
2
2
2
2
C Master Operation
C Module
C 10-bit Slave Mode Operation ..................................... 111
C 7-bit Slave Mode Operation ....................................... 111
C™ Module ................................................................... 109
Register Map (dsPIC30F6010A) ................................ 46
Register Map (dsPIC30F6015) .................................. 47
Interrupt Stack Frame ................................................ 45
Baud Rate Generator ............................................... 113
Clock Arbitration ....................................................... 114
Multi-Master Communication, Bus Collision
and Bus Arbitration .................................................. 114
Reception ................................................................. 113
Transmission ............................................................ 113
Addresses ................................................................ 111
General Call Address Support ................................. 113
Interrupts .................................................................. 113
IPMI Support ............................................................ 113
Master Operation ..................................................... 113
Master Support ........................................................ 113
Operating Function Description ............................... 109
Operation During CPU Sleep and Idle Modes ......... 114
Pin Configuration ..................................................... 109
Programmer’s Model ................................................ 109
Register Map ............................................................ 115
Registers .................................................................. 109
Slope Control ........................................................... 113
Software Controlled Clock Stretching (STREN = 1) . 112
Various Modes ......................................................... 109
10-bit Mode Slave Reception ................................... 112
10-bit Mode Slave Transmission .............................. 112
Reception ................................................................. 111
Transmission ............................................................ 111
Core Register Map ..................................................... 32
Applicability ................................................................ 38
Operation Example .................................................... 37
Start and End Address ............................................... 37
W Address Register Selection ................................... 37
8-Output Register Map ............................................. 104
Operating Modes (Table) ......................................... 150
System Overview ..................................................... 149
Fail-Safe Clock Monitor ............................................ 154
Fast RC (FRC) ......................................................... 153
DD
) .................................................... 180
dsPIC30F6010A/6015
Oscillator Selection .......................................................... 149
Output Compare Module ................................................... 85
P
Packaging Information ..................................................... 217
Peripheral Module Disable (PMD) Registers ................... 162
PICSTART Plus Development Programmer .................... 176
Pin Diagrams ................................................................... 5–6
Pinout Descriptions ............................................................ 12
POR. See Power-on Reset.
Position Measurement Mode ............................................. 90
Power Saving Modes
Power-on Reset (POR) .................................................... 149
Power-Saving Modes ....................................................... 160
Power-Saving Modes (Sleep and Idle) ............................ 149
Program Address Space .................................................... 23
Program Counter ............................................................... 16
Program Data Table Access .............................................. 26
Program Space Visibility
Programmable ................................................................. 149
Programmable Digital Noise Filters ................................... 91
Programmer’s Model ......................................................... 16
Programming Operations ................................................... 51
Protection Against Accidental Writes to OSCCON .......... 155
PWM Duty Cycle Comparison Units .................................. 99
PWM Fault Pins ............................................................... 102
PWM Operation During CPU Idle Mode .......................... 103
PWM Operation During CPU Sleep Mode ....................... 103
Initial Clock Source Selection .................................. 152
Low-Power RC (LPRC) ........................................... 154
LP Oscillator Control ................................................ 153
Phase Locked Loop (PLL) ....................................... 153
Start-up Timer (OST) ............................................... 153
Interrupts ................................................................... 87
Operation During CPU Idle Mode .............................. 87
Operation During CPU Sleep Mode .......................... 87
Register Map ............................................................. 88
Marking .................................................................... 217
Idle ........................................................................... 161
Sleep ....................................................................... 160
Oscillator Start-up Timer (OST) ............................... 149
Power-up Timer (PWRT) ......................................... 149
Construction .............................................................. 24
Data Access from Program Memory Using Table Instruc-
Data Access from, Address Generation .................... 24
Memory Map .............................................................. 23
Table Instructions
Window into Program Space Operation .................... 27
Diagram ..................................................................... 17
Algorithm for Program Flash ...................................... 51
Erasing a Row of Program Memory .......................... 51
Initiating the Programming Sequence ....................... 52
Loading Write Latches ............................................... 52
Duty Cycle Immediate Updates ................................. 99
Duty Cycle Register Buffers ...................................... 99
Enable Bits .............................................................. 102
Fault States ............................................................. 102
Input Modes ............................................................. 102
Priority ..................................................................... 102
tions ................................................................... 25
TBLRDH ............................................................ 25
TBLRDL ............................................................. 25
TBLWTH ............................................................ 25
TBLWTL ............................................................ 25
Cycle-by-Cycle ................................................ 102
Latched ............................................................ 102
DS70150D-page 225