IP-POSPHY4 Altera, IP-POSPHY4 Datasheet - Page 70

• Manufacturer Part Number: IP-POSPHY4
• Description: IP CORE - POS-PHY Level 4 SPI 4.2 Interface
• Manufacturer: Altera
• Type: MegaCorer

Specifications of IP-POSPHY4

• Software Application: IP CORE, Interface And Protocols, COMMUNICATION
• Supported Families: Arria GX, Cyclone, HardCopy, Stratix
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Function: POS-PHY Level 4 Interface, Link-Layer/PHY Layer
• License: Initial License
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

4–30
Table 4–12. Avalon-MM Interface Register Map
POS-PHY Level 4 MegaCore Function User Guide
0
1
2
3
4
5
6
7
8
9..15
Address
12:0
15:13
0
1
2
3
4
5
7:0
7:0
9:0
9:0
9:0
7:0
7:0
—
Bits
1
1
AOT_ID
BLOCK_ID
HBWR_EN
RSFRM
CALSEL_REQ
CALSEL_ACT
RSERVED
DISABLED
CALM0
CALM1
CALLEN0
CALLEN1
CALMEM_ADR
CALMEM_DAT0
CALMEM_DAT1
RESERVED
If the hitless bandwidth repositioning (HBWR) register is not enabled, the CALM1,
CALLEN1, and CALMEM_DAT1 registers become reserved.
Only change the CALM0, CALLEN0, and CALMEM_DAT0 registers when the DISABLED
register is equal to 1, or when the CALSEL_ACT register is equal to 1. Only change the
CALM1, CALLEN1, and CALMEM_DAT1 registers when the DISABLED register is equal to 1, or
when the CALSEL_ACT register is equal to 0.
Name
Read only status
Read only status
Read write control
Read write control
Read write control
Read only status
Reserved
Read only status
Read write control
Read write control
Read write control
Read write control
Read write indirect
control
Read write indirect data
Read write indirect data
Reserved
Type
AOT code
Block ID
HBWR_EN enables the calendar select word in the status
frame.
RSFRM disables the status finite state machine. The
framing word 'b11 is sent continuously starting at the
next frame boundary. Regular behavior resumes when
this bit is cleared. The value of the register is ORed with
the ctl_ry_rsfrm input.
This bit resets to one. Therefore, you must reprogram
the calendar and clear this bit whenever the MegaCore
function is reset.
CALSEL_REQ sets the value of the calendar select word
at the next frame boundary. 0='b01, 1='b10
CALSEL_ACT is the active calendar select word.
0='b01, 1='b10
Reserved.
Mirror of stat_ry_disabled.
CALM when CALSEL_ACT=0.
CALM when CALSEL_ACT=1.
CALLEN when CALSEL_ACT=0.
CALLEN when CALSEL_ACT=1.
Refer to CALMEM_DAT0 and CALMEM_DAT1.
If write, CALMEM_ADR is applied to the write address of
RAM and CALMEM_DAT0 is applied to the write data.
If read, CALMEM_ADR is applied to read address of
RAM, and resulting read data is captured in
CALMEM_DAT0.
If write, CALMEM_ADR is applied to the write address of
RAM and CALMEM_DAT1 is applied to the write data.
If read, CALMEM_ADR is applied to read address of
RAM, and resulting read data is captured in
CALMEM_DAT1.
Reserved.
Chapter 4: Functional Description—Receiver
Description
December 2010 Altera Corporation
Avalon-MM Interface Register Map