MPU-6050 INVENSENSE, MPU-6050 Datasheet - Page 32

• Manufacturer Part Number: MPU-6050
• Description: GYRO/ACCEL, 9-AXIS FUSION, PROG, I2C
• Manufacturer: INVENSENSE

Specifications of MPU-6050

• No. Of Axes: 9
• Sensor Case Style: QFN
• No. Of Pins: 24
• Supply Voltage Range: 2.5V To 3.6V
• Operating Temperature Range: -40°C To +85°C
• Interface: I2C
• Acceleration Range: ± 2g, ± 4g, ± 8g, ± 16g
• Interface Type: I2C, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10.1
The internal registers and memory of the MPU-6000/MPU-6050 can be accessed using either I
or SPI at 1MHz (MPU-6000 only). SPI operates in four-wire mode.
Serial Interface
Note:
To prevent switching into I
setting the I2C_IF_DIS configuration bit. Setting this bit should be performed immediately after waiting the
time specified by the “Start-Up Time for Register Read/Write” in Section 3.2.
10.2
I
lines are open-drain and bi-directional. In a generalized I
be a master or a slave. The master device puts the slave address on the bus, and the slave device with the
matching address acknowledges the master.
The MPU-60X0 always operates as a slave device when communicating to the system processor, which thus
acts as the master. SDA and SCL lines typically need pull-up resistors to VDD. The maximum bus speed is
400 kHz.
The slave address of the MPU-60X0 is b110100X which is 7 bits long. The LSB bit of the 7 bit address is
determined by the logic level on pin AD0. This allows two MPU-60X0s to be connected to the same I
When used in this configuration, the address of the one of the devices should be b1101000 (pin AD0 is logic
low) and the address of the other should be b1101001 (pin AD0 is logic high).
10.3
START (S) and STOP (P) Conditions
Communication on the I
defined as a HIGH-to-LOW transition of the SDA line while SCL line is HIGH (see figure below). The bus is
considered to be busy until the master puts a STOP condition (P) on the bus, which is defined as a LOW to
HIGH transition on the SDA line while SCL is HIGH (see figure below).
2
C is a two-wire interface comprised of the signals serial data (SDA) and serial clock (SCL). In general, the
Pin Number
23
23
24
24
8
8
9
9
I
I
I
2
2
2
10 Digital Interface
C and SPI (MPU-6000 only) Serial Interfaces
C Interface
C Communications Protocol
MPU-6000
Y
Y
Y
Y
2
C bus starts when the master puts the START condition (S) on the bus, which is
2
MPU-6000/MPU-6050 Product Specification
C mode when using SPI (MPU-6000), the I
MPU-6050
Y
Y
Y
Y
SCL / SCLK
AD0 / SDO
Pin Name
SDA / SDI
VLOGIC
SDA
AD0
SCL
/CS
32 of 53
Pin Description
SPI chip select (0=SPI enable)
Digital I/O supply voltage. VLOGIC must be ≤ VDD at all times.
I
I
I
I
I
I
2
2
2
2
2
2
C Slave Address LSB (AD0); SPI serial data output (SDO)
C Slave Address LSB
C serial clock (SCL); SPI serial clock (SCLK)
C serial clock
C serial data (SDA); SPI serial data input (SDI)
C serial data
2
C interface implementation, attached devices can
2
C interface should be disabled by
Document Number: PS-MPU-6000A-00
Revision: 1.0
Release Date: 11/24/2010
2
C at 400 kHz
2
C bus.