ADUC7121BBCZ-RL Analog Devices Inc, ADUC7121BBCZ-RL Datasheet - Page 61

• Manufacturer Part Number: ADUC7121BBCZ-RL
• Description: PRECISION ANALOG MCU I.C
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7121BBCZ-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 41.78MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 126KB (63K x 16)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x12b, D/A 4x12b
• Oscillator Type: Internal
• Operating Temperature: -10°C ~ 95°C
• Package / Case: 108-LFBGA, CSPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADUC7121BBCZ-RL; ADUC7121BBCZ-RLTR

UART Status Register 0
Name:
Address:
Default value:
Access:
Function:
Table 83. COMSTA0 MMR Bit Designations
Bit
7
6
5
4
3
2
1
0
COMSTA0
0xFFFF0814
0x60
Read only
This 8-bit read-only register reflects the current status on the UART.
Name
TEMT
THRE
BI
FE
PE
OE
DR
Description
Reserved.
COMTX and shift register empty status bit.
Set automatically if COMTX and the shift register are empty. This bit indicates that the data has
been transmitted, that is, no more data is present in the shift register.
Cleared automatically when writing to COMTX.
COMTX empty status bit.
Set automatically if COMTX is empty. COMTX can be written as soon as this bit is set; the previous
data might not have been transmitted yet and can still be present in the shift register.
Cleared automatically when writing to COMTX.
Break indicator.
Set when SIN of the P1.0/SIN/SCL1/PLAI[7] pin is held low for more than the maximum word
length.
Cleared automatically.
Framing error.
Set when the stop bit is invalid.
Cleared automatically.
Parity error.
Set when a parity error occurs.
Cleared automatically.
Overrun error.
Set automatically if data are overwritten before being read.
Cleared automatically.
Data ready.
Set automatically when COMRX is full.
Cleared by reading COMRX.
Rev. 0 | Page 61 of 96
ADuC7121