DJLXT386LE.B2 S E001 Intel, DJLXT386LE.B2 S E001 Datasheet - Page 13

• Manufacturer Part Number: DJLXT386LE.B2 S E001
• Manufacturer: Intel

Specifications of DJLXT386LE.B2 S E001

• Lead Free Status / RoHS Status: Not Compliant

Datasheet
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;
2. N/C means “Not Connected”
PBGA
Ball #
N.C.: Not Connected.
Table 1. Pin Assignments and Signal Descriptions (Sheet 3 of 11)
G2
H3
H2
M1
M2
M3
K1
L1
L2
L3
K3
J4
J3
J2
J1
LQFP
Pin #
90
91
92
93
94
95
96
97
12
13
14
15
16
17
18
D4/DLOOP0
D5/DLOOP1
D6/DLOOP2
D7/DLOOP3
D0/LOOP0
D1/LOOP1
D2/LOOP2
D3/LOOP3
RDATA1
Symbol
TDATA1
TNEG1/
RPOS1/
RNEG1/
TPOS1/
RCLK1
TCLK1
UBS1
BPV1
LOS1
DI/O
DI/O
DI/O
DI/O
DI/O
DI/O
DI/O
DI/O
I/O
DO
DO
DO
DO
DO
DO
DI
DI
DI
DI
DI
1
Loopback Mode Select/Parallel Data bus.
Host Mode:
When a non-multiplexed microprocessor interface is selected, these pins
function as a bi-directional 8-bit data port.
When a multiplexed microprocessor interface is selected, these pins carry
both bi-directional 8-bit data and address inputs A0 -A7.
In serial Mode, D0-7 should be grounded.
Hardware Mode:
In hardware mode, the LXT386 works in normal operation if this pin is left
open (unconnected).
The LXT386 enters remote loopback mode if LOOP is Low. In this mode,
data on TPOS and TNEG is ignored and data received on RTIP and
RRING is looped around and retransmitted on TTIP and TRING. Note: in
data recovery mode, the pulse template cannot be guaranteed while in a
remote loopback.
The LXT386 enters analog local loopback mode if LOOP=1 and
DLOOP=0. In this mode, data received on RTIP and RRING is ignored
and data transmitted on TTIP and TRING is internally looped around and
routed back to the receive inputs.
The LXT386 enters digital local loopback if LOOP=1 and DLOOP=1. In
this mode, data received on TCLK/TPOS/TNEG is digitally looped back to
RCLK/RPOS/RNEG.
Note: Note: when these inputs are left open, they stay in a high
Transmit Clock.
Transmit Positive Data.
Transmit Data.
Transmit Negative Data.
Unipolar/Bipolar Select.
Receive Clock.
Receive Positive Data.
Receive Data.
Receive Negative Data.
Bipolar Violation Detect.
Loss of Signal.
LOOP
Open
impedance state. Therefore, the layout design should not route
signals with fast transitions near the LOOP pins. This practice will
minimize capacitive coupling.
0
1
1
DLOOP
QUAD T1/E1/J1 Transceiver — LXT386
0
1
x
x
Description
Normal Mode
Remote Loopback
Analog Local Loopback
Digital Local Loopback
Operating Mode
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