DJLXT386LE.B2 S E001 Intel, DJLXT386LE.B2 S E001 Datasheet - Page 53

• Manufacturer Part Number: DJLXT386LE.B2 S E001
• Manufacturer: Intel

Specifications of DJLXT386LE.B2 S E001

• Lead Free Status / RoHS Status: Not Compliant

5.4
5.4.1
Datasheet
Bit #
0
Example 1. Boundary Scan Register – BSR (Sheet 1 of 3)
RNEG3
RNEG2
RPOS3
RCLK3
TNEG3
TPOS3
RPOS2
RCLK2
TNEG2
TPOS2
TCLK3
TCLK2
Signal
MODE
MCLK
LOS3
LOS2
CLKE
ACK
ALE
N/A
N/A
N/A
Pin
INT
OE
A0
A1
JTAG Register Description
The following paragraphs describe each of the registers represented in
Boundary Scan Register (BSR)
The BSR is a shift register that provides access to all the digital I/O pins. The BSR is used to apply
and read test patterns to/from the board. Each pin is associated with a scan cell in the BSR register.
Bidirectional pins or tristatable pins require more than one position in the register.
the BSR scan cells and their functions. Data into the BSR is shifted in LSB first.
Type
I/O
O
O
O
O
O
O
O
O
O
O
-
I
I
I
-
I
I
I
I
I
-
I
I
I
I
I
SDORDYENB
INTRUPTB
SDORDY
Symbol
RNEG3
RNEG2
RPOS3
TNEG3
TPOS3
RPOS2
TNEG2
TPOS2
RCLK3
RCLK2
TCLK3
TCLK2
MODE
MCLK
LOS3
LOS2
CLKE
HIZ3
HIZ2
ALE
OE
Bit
A0
A1
HIZ3 controls the RPOS3, RNEG3 and RCLK3 pins. Setting HIZ3 to “0”
enables output on the pins. Setting HIZ3 to “1” tristates the pins.
HIZ2 controls the RPOS2, RNEG2 and RCLK2 pins. Setting HIZ2 to “0”
enables output on the pins. Setting HIZ2 to “1” tristates the pins.
SDORDYENB controls the ACK pin. Setting SDORDYENB to “0” enables
output on ACK pin. Setting SDORDYENB to “1” tristates the pin.
QUAD T1/E1/J1 Transceiver — LXT386
Comments
Figure
15.
Table 1
shows
53