DJLXT386LE.B2 S E001 Intel, DJLXT386LE.B2 S E001 Datasheet - Page 46
DJLXT386LE.B2 S E001
Manufacturer Part Number
DJLXT386LE.B2 S E001
Description
Manufacturer
Intel
Datasheet
1.DJLXT386LE.B2_S_E001.pdf
(86 pages)
Specifications of DJLXT386LE.B2 S E001
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LXT386 — QUAD T1/E1/J1 Transceiver
46
Bit
1. On power up all register bits are set to “0”.
2. During digital loopback LOS and TAOS stay active and independent of TCLK, while data received on TPOS/TNEG/TCKLK is
1. On power-on reset the register is set to “0”.
2. T1 or E1 operation mode is determined by the PSDR settings.
1
Bit
3-0
3-0
3-0
3-0
3-0
3-0
Bit
Bit
Bit
Bit
looped back to RPOS/RNEG/RCLK.
4-7
Table 16. LOS Interrupt Status Register, LIS (08H)
Table 17. DFM Interrupt Status Register, DIS (09H)
Table 18. Software Reset Register, RES (0AH)
Table 19. Performance Monitoring Register, MON (0BH)
Table 20. Digital Loopback Register, DL (0CH)
Table 21. LOS/AIS Criteria Register, LCS (0DH)
1
Name
LCS3-LCS0
RES3-RES0
DIS3-DIS0
LIS3-LIS0
DL3-DL0
reserved
Name
Name
A3:A0
Name
Name
Name
1
These bits are set to “1” every time a DFM status change has occurred since the last
cleared interrupt in transceivers 3-0 respectively.
These bits are set to “1” every time a LOS status change has occurred since the last clear
interrupt in transceivers 3-0 respectively.
Writing to this register initiates a 1 microsecond reset cycle, except for Intel non-
multiplexed mode. When using Intel non-multiplexed host mode, extend cycle time to 2
microseconds. Please refer to Host Mode section for more information. This operation
sets all LXT386 registers to their default values.
Protected Monitoring selection. See
Reserved.
Function
Setting a bit to “1” enables digital loopback for the respective transceiver.
T1 Mode
Don’t care. T1.231 compliant LOS/AIS detection is used.
E1 Mode
Setting a bit to “1” selects the ETS1 300233 LOS. Setting a bit to “0” selects G.775 LOS
mode. AIS works correctly for both ETSI and ITU when the bit is cleared to “0”. See
errata revision 10.3 or higher for a way to implement ETSI LOS and AIS.
2
2
Table 1 on page
Function
Function
Function
Function
Function
2
11.
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