DJLXT386LE.B2 S E001 Intel, DJLXT386LE.B2 S E001 Datasheet - Page 18

• Manufacturer Part Number: DJLXT386LE.B2 S E001
• Manufacturer: Intel

Specifications of DJLXT386LE.B2 S E001

• Lead Free Status / RoHS Status: Not Compliant

LXT386 — QUAD T1/E1/J1 Transceiver
18
1. DI: Digital Input; DO: Digital Output; DI/O: Digital Bidirectional Port; AI: Analog Input; AO: Analog Output S: Power Supply;
2. N/C means “Not Connected”
PBGA
Ball #
N.C.: Not Connected.
Table 1.
J14
J13
J12
Pin Assignments and Signal Descriptions (Sheet 8 of 11)
LQFP
Pin #
82
3
2
Symbol
R / W/
SCLK/
LEN0
LEN1
LEN2
ALE/
WR/
SDI/
DS/
RD/
AS/
I/O
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
DI
1
Data Strobe (Motorola Mode).
Write Enable (Intel mode).
Serial Data Input (Serial Mode).
Line Length Equalizer (Hardware Mode).
Host Mode
This pin acts as data strobe in Motorola mode and as Write Enable in Intel
mode. In serial mode this pin is used as Serial Data Input.
Hardware Mode
This pin determines the shape and amplitude of the transmit pulse. Refer
to
Read/Write (Motorola Mode).
Read Enable (Intel mode).
Line Length Equalizer (Hardware Mode).
Host Mode
This pin functions as the read/write signal in Motorola mode and as the
Read Enable in Intel mode.
Hardware Mode
This pin determines the shape and amplitude of the transmit pulse. Refer
to
Address Latch Enable (Host Mode).
Shift Clock (Serial Mode).
Address Strobe (Motorola Mode).
Line Length Equalizer (Hardware Mode).
Host Mode
The address on the multiplexed address/data bus is clocked into the
device with the falling edge of ALE.
In serial Host mode this pin acts as serial shift clock.
In Motorola mode this pin acts a an active Low address strobe.
Hardware Mode
This pin determines the shape and amplitude of the transmit pulse. Refer
to
Table
Table
Table
2.
2.
2.
Description
Datasheet