AM79C976KI AMD (ADVANCED MICRO DEVICES), AM79C976KI Datasheet - Page 147

• Manufacturer Part Number: AM79C976KI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C976KI

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

DATAMBIST: Memory Built-in Self-Test Access
Register
Offset 1A0h
This register is used to control and indirectly access the
Memory Built-in Self-Test (MBIST) logic that automati-
cally tests the external SSRAM.
9/14/00
SWSTYLE
All Other
Bit
63
62
61
60
59
[7:0]
00h
01h
02h
03h
04h
05h
DM_FAIL_STOP
DM_RESUME
DM_ERROR
DM_START
DM_DONE
Name
PCnet-ISA controller
PCnet-PCI controller
64-bit address
PCnet-PCI
Reserved
controller
LANCE/
Table 51. DATAMBIST: Memory Built-in Self-Test Access Register
Name
VLAN
Style
RES
MBIST done indicator. This bit is set to 1 when the automatic memory test has stopped, either
because the test has completed or because an error was detected. It is cleared to 0 when either
DM_START or DM_RESUME is set.
This bit is read-only.
MBIST error indicator. This bit is set to 1 when the memory test logic has detected a memory error.
It is cleared to 0 when either DM_START or DM_RESUME is set.
This bit is read-only.
MBIST Start. Setting this bit to 1 resets the MBIST logic, including the DM_ERROR and
DM_TEST_FAIL bits, and starts the memory test process. DM_START should not be set at the
same time that the DM_RESUME bit is set.
DM_START is automatically cleared when the memory test stops. This bit is read/write.
MBIST Resume. Setting this bit to 1 restarts the memory test sequence at the point where it last
stopped. Setting this bit clears the DM_ERROR bit, but it does not clear the DM_TEST_FAIL bit.
This bit should not be set at the same time that the DM_START bit is set.
DM_RESUME is automatically cleared when the memory test stops. This bit is read/write.
MBIST Stop on Failure Control. When this bit is set to 1, the memory test will stop each time an
error is detected. When this bit is cleared to 0, the memory test will run to completion, regardless
of the number of errors that are detected.
This bit is read/write.
Undefined
SSIZE32
P R E L I M I N A R Y
Table 50. Software Styles
0
1
1
1
1
1
Am79C976
16-bit software structures,
non-burst or burst access
RES
32-bit software structures,
non-burst or burst access
32-bit software structures,
non-burst or burst access
Not used
Not used
Undefined
Initialization Block Entries
The contents of this register are cleared to 0 when the
RST pin is asserted. The register is not cleared at the
start of a serial EEPROM read operation or after a se-
rial EEPROM read error.
Description
16-bit software structures, non-
burst access only
RES
32-bit software structures, non-
burst access only
32-bit software structures, non-
burst or burst access
32-bit software structures, non-
burst or burst access
32-bit software structures, 32-
byte descriptors, non-burst or
burst access
Undefined
Descriptor Ring Entries
147