AM79C976KI AMD (ADVANCED MICRO DEVICES), AM79C976KI Datasheet - Page 174

• Manufacturer Part Number: AM79C976KI
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM79C976KI

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (max): 3.63V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / RoHS Status: Not Compliant

RAP Register
The RAP (Register Address Pointer) register is used to
gain access to CSR and BCR registers on board the
Am79C976 controller. The RAP contains the address
of a CSR or BCR.
As an example of RAP use, consider a read access to
CSR4. In order to access this register, it is necessary
to first load the value 0004h into the RAP by performing
a write access to the RAP offset of 12h (12h when WIO
mode has been selected, 14h when DWIO mode has
been selected). Then a second access is performed,
this time to the RDP offset of 10h (for either WIO or
DWIO mode). The RDP access is a read access, and
since RAP has just been loaded with the value of 0004h,
the RDP read will yield the contents of CSR4. A read of
the BDP at this time (offset of 16h when WIO mode has
been selected, 1Ch when DWIO mode has been select-
ed) will yield the contents of BCR4, since the RAP is
used as the pointer into both BDP and RDP space.
174
15-0
Bit
XMTPOLLTIME
Name
Transmit Polling Interval. This register contains the time that the Am79C976 controller will wait
between successive polling operations. The XMTPOLLTIME value is expressed as the two’s
complement of the desired interval, where each bit of XMTPOLLTIME represents ERCLK clock
periods. XMTPOLLTIME[3:0] are ignored. (XMTPOLLTIME[16] is implied to be a one, so
XMTPOLLTIME[15] is significant and does not represent the sign of the two’s complement
XMTPOLLTIME value.)
The default value of this register is 0000h. This corresponds to a polling interval of 65,536 clock
periods (2.185 ms when ERCLK = 90 MHz).
Setting the INIT bit starts an initialization process that sets XMTPOLLTIME to its default value. If
the user wants to program a value for XMTPOLLTIME other than the default, then he must change
the value after the initialization sequence has completed.
This register is an alias for CSR47.
Table 84.
XMTPOLLTIME: Transmit Polling Interval Register
P R E L I M I N A R Y
Am79C976
RAP: Register Address Port
Bit
31-16 RES
15-8
7-0
Description
Name
RES
RAP
A write access to undefined CSR
or BCR locations may cause un-
expected reprogramming of the
Am79C976 control registers. A
read access will yield undefined
values.
Read/Write accessible. RAP is
cleared
S_RESET and is unaffected by
setting the STOP bit.
Reserved locations. Written as
zeros and read as undefined.
Reserved locations. Read and
written as zeros.
Register Address Port. The value
of these 8 bits determines which
CSR or BCR will be accessed
when an I/O access to the RDP
or BDP port, respectively, is per-
formed.
Description
by
H_RESET
9/14/00
or